PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 215

• Manufacturer Part Number: PIC16F1826-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1826-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 2kWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.6
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 23-5:
TABLE 23-7:
© 2009 Microchip Technology Inc.
ECCP Mode
Single
Half-Bridge
Full-Bridge, Forward
Full-Bridge, Reverse
Note 1:
Note:
Note 1: The TRIS register value for each PWM output must be configured appropriately.
CCPRxH (Slave)
Duty Cycle Registers
Note 1:
Comparator
2: Clearing the CCPxCON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
CCPRxL
PRx
TMRx
Comparator
PWM Steering enables outputs in Single mode.
The PWM Enhanced mode is available on
the Enhanced Capture/Compare/PWM
module (CCP1) only.
The 8-bit timer TMRx register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit
time base.
EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timerx,
toggle PWM pin and
latch duty cycle
DCxB<1:0>
PxM<1:0>
00
10
01
11
R
S
PxM<1:0>
Q
CCPx/P1A
Yes
Preliminary
Yes
Yes
Yes
(1)
PWMxCON
Controller
Output
2
CCPx/P1A
P1B
P1C
P1D
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 23-7 shows the pin assignments for each
Enhanced PWM mode.
Figure 23-5 shows an example of a simplified block
diagram of the Enhanced PWM module.
4
CCPxM<3:0>
Note:
Yes
P1B
Yes
Yes
Yes
PIC16F/LF1826/27
TRISx
TRISx
TRISx
TRISx
(1)
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
prevent
Yes
P1C
Yes
Yes
No
the
(1)
CCPx/P1A
P1B
P1D
P1C
generation
DS41391B-page 215
Yes
P1D
Yes
Yes
No
(1)
of
an