PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 32

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PIC16F1826-I/MQ

Manufacturer Part Number
PIC16F1826-I/MQ
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1826-I/MQ

Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
2kWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1826/27
TABLE 3-8:
DS41391B-page 32
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
Legend:
Note 1:
Address
Bank 2
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
2:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
LATA
LATB
CM1CON0
CM1CON1
CM2CON0
CM2CON1
CMOUT
BORCON
FVRCON
DACCON0
DACCON1
SRCON0
SRCON1
APFCON0
APFCON1
PIC16F/LF1827 only.
These registers can be addressed from any bank.
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
RXDTSEL
SBOREN
C1INTP
C2INTP
DACEN
FVREN
SRLEN
SRSPE
LATA7
LATB7
C1ON
C2ON
Bit 7
GIE
---
---
Write Buffer for the upper 7 bits of the Program Counter
SDO1SEL
FVRRDY
DACLPS
SRSCKE
SRCLK2
C1INTN
C2INTN
C1OUT
C2OUT
LATB6
LATA6
Bit 6
PEIE
---
---
Reserved
C1PCH1
C2PCH1
SRSC2E
SRCLK1
SS1SEL
TMR0IE
DACOE
LATB5
C1OE
C2OE
Bit 5
---
---
Preliminary
P2BSEL
Reserved
C1PCH0
C2PCH0
SRSC1E
SRCLK0
C1POL
C2POL
DACR4
LATA4
LATB4
BSR4
INTE
Bit 4
TO
---
---
(1)
CCP2SEL
CDAFVR1
DACPSS1
SRQEN
SRRPE
DACR3
LATA3
LATB3
BSR3
IOCIE
Bit 3
PD
---
(1)
CDAFVR0
DACPSS0
SRNQEN
SRRCKE
P1DSEL
TMR0IF
DACR2
LATA2
LATB2
BSR2
C1SP
C2SP
Bit 2
---
Z
MC2OUT
SRRC2E
C1NCH1
C2NCH1
ADFVR1
P1CSEL
C1HYS
C2HYS
DACR1
LATB1
LATA1
BSR1
SRPS
© 2009 Microchip Technology Inc.
Bit 1
INTF
DC
---
---
CCP1SEL 0000 0000 0000 0000
TXCKSEL ---- ---0 ---- ---0
BORRDY 1--- ---q u--- ---u
MC1OUT ---- --00 ---- --00
DACNSS 000- 00-0 000- 00-0
SRRC1E
C1SYNC
C1NCH0
C2SYNC
C2NCH0
ADFVR0
DACR0
LATA0
LATB0
SRPR
BSR0
IOCIF
Bit 0
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
xx-x xxxx uu-u uuuu
xxxx xxxx uuuu uuuu
0000 -100 0000 -100
0000 --00 0000 --00
0000 -100 0000 -100
0000 --00 0000 --00
0qrr 0000 0qrr 0000
---0 0000 ---0 0000
0000 0000 0000 0000
0000 0000 0000 0000
POR, BOR
Value on:
Value on all
resets
other

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