LPC1226FBD48/301 NXP Semiconductors, LPC1226FBD48/301 Datasheet - Page 14
![MCU, 96K FLASH, CORTEX-M0, 48LQFP](/photos/19/0/190032/ge48lqfp05-40_sml.jpg)
LPC1226FBD48/301
Manufacturer Part Number
LPC1226FBD48/301
Description
MCU, 96K FLASH, CORTEX-M0, 48LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1224FBD48201.pdf
(60 pages)
Specifications of LPC1226FBD48/301
Rohs Compliant
YES
Featured Product
LPC122x Cortex-M0 Microcontrollers
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
45MHz
Connectivity
I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
LPC1200
No. Of I/o's
39
Ram Memory Size
8KB
Cpu Speed
30MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5161
LPC1226FBD48/301
LPC1226FBD48/301
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1226FBD48/301
Manufacturer:
ROHM
Quantity:
12 000
Company:
Part Number:
LPC1226FBD48/301,1
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
LPC122X
Objective data sheet
Symbol
V
V
V
V
DD(IO)
DD(3V3)
SSIO
SS
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled.
3.3 V tolerant, digital I/O pin; default: pull-up enabled, no hysteresis.
I
3.3 V tolerant, digital I/O pin with RESET function; default: pull-up enabled, no hysteresis. An external pull-up resistor is required on this
pin for the Deep power-down mode.
3.3 V tolerant, digital I/O pin with analog function; default: pull-up enabled, no hysteresis.
3.3 V tolerant, digital I/O pin with analog function and WAKEUP function; default: pull-up enabled, no hysteresis.
3.3 V tolerant, high-drive digital I/O pin; default: pull-up enabled, no hysteresis.
2
C-bus pins; 5 V tolerant; open-drain; default: no pull-up/pull-down; no hysteresis.
LPC122x pin description
To enable a peripheral function, find the corresponding port pin, or select a port pin if the
function is multiplexed, and program the port pin’s IOCONFIG register to enable that
function. The primary SWD functions and RESET are the default functions on their pins
after reset, all other digital pins default to GPIO.
Table 4.
Peripheral
Analog comparators
ADC
47 63
44 56
48 64
43 55
Pin multiplexing
Start
logic
input
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…continued
All information provided in this document is subject to legal disclaimers.
Type Reset
I
I
I
I
Rev. 1.2 — 29 March 2011
state
[1]
-
-
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Function
ROSC
ACMP0_I0
ACMP0_I1
ACMP0_I2
ACMP0_I3
ACMP0_O
ACMP1_I0
ACMP1_I1
ACMP1_I2
ACMP1_I3
ACMP1_O
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
Description
Input/output supply voltage.
3.3 V supply voltage to the internal regulator and the ADC. Also
used as the ADC reference voltage.
Ground.
Ground.
Type
I/O
I
I
I
I
O
I
I
I
I
O
I
I
I
I
I
I
I
I
32-bit ARM Cortex-M0 microcontroller
Available on ports:
PIO0_29
PIO0_19
PIO0_20
PIO0_21
PIO0_22
PIO0_27
PIO0_23
PIO0_24
PIO0_25
PIO0_26
PIO0_28
PIO0_30
PIO0_31
PIO1_0
PIO1_1
PIO1_2
PIO1_3
PIO1_4
PIO1_5
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-
-
-
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-
-
-
-
-
-
-
-
-
-
LPC122x
© NXP B.V. 2011. All rights reserved.
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