PIC24FJ256GA106-I/MR Microchip Technology, PIC24FJ256GA106-I/MR Datasheet - Page 12
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ256GA106-I/MR
Manufacturer Part Number
PIC24FJ256GA106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA106-I/MR
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC24FJXXXDA1/DA2/GB2/GA3
2.4
The program memory map extends from 000000h to
FFFFFEh. Code storage is located at the base of the
memory map and supports up to 87K instruction words
(about 256 Kbytes).
memory size, and number of erase and program blocks
present in each device variant. Each erase block, or
page, contains 512 instructions, and each program
block, or row, contains 64 instructions.
Locations, 800000h through 8007FEh, are reserved for
executive code memory. This region stores the
programming executive and the debugging executive.
The programming executive is used for device
programming and the debugging executive is used for
in-circuit debugging. This region of memory cannot be
used to store user code.
TABLE 2-2:
DS39970B-page 12
PIC24FJ64GA3XX
PIC24FJ128DA1XX
PIC24FJ128DA2XX
PIC24FJ128GB2XX
PIC24FJ128GA3XX
PIC24FJ256DA1XX
PIC24FJ256DA2XX
PIC24FJ256GB2XX
Device
Memory Map
CODE MEMORY SIZE AND FLASH CONFIGURATION WORD LOCATIONS FOR
PIC24FJXXXDA1/DA2/GB2/GA3 DEVICES
Table 2-2
(Instruction Words)
00ABFEh (22K)
02ABFEh (87K)
0157FEh (44K)
Address Limit
User Memory
provides the program
Blocks
Write
1368
344
688
Blocks
Erase
171
43
86
The last four implemented program memory locations
are reserved for the Flash Configuration Words. The
reserved addresses are provided in
Locations, FF0000h and FF0002h, are reserved for the
Device ID registers. These bits can be used by the
programmer to identify what device type is being
programmed. They are described in
“Device
normally, even after code protection is applied.
Figure 2-14
PIC24FJXXXDA1/DA2/GB2/GA3 family variants.
00ABFEh 00ABFCh 00ABFAh
02ABFEh 02ABFCh 02ABFAh
0157FEh
ID”. The Device ID registers read out
1
Configuration Word Addresses
displays the memory map for the
0157FCh
2
2010 Microchip Technology Inc.
0157FAh
3
Table
2-2.
Section 6.1
00ABF8h
02ABF8h
0157F8h
4