AM29F016D-90SF Spansion Inc., AM29F016D-90SF Datasheet - Page 10

• Manufacturer Part Number: AM29F016D-90SF
• Description: IC, FLASH, 16MBIT, 90NS, SOIC-44
• Manufacturer: Spansion Inc.

Specifications of AM29F016D-90SF

• Memory Type: Flash
• Memory Size: 16Mbit
• Memory Configuration: 2M X 8
• Ic Interface Type: Parallel
• Access Time: 90ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 44
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memor y
location. The register is composed of latches that store
the commands, along with the address and data infor-
mation needed to execute the command. The contents
Legend:
L = Logic Low = V
Note: See the sections on Sector Group Protection and Temporary Sector Unprotect for more information
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output control
and gates array data to the output pins. WE# should re-
main at V
The internal state machine is set for reading array
data upon device power-up, or after a hardware reset.
This ensures that no spurious alteration of the mem-
ory content occurs during the power transition. No
command is necessary in this mode to obtain array
data. Standard microprocessor read cycles that as-
sert valid addresses on the device address inputs
produce valid data on the device data outputs. The
device remains enabled for read access until the
command register contents are altered.
See
to the AC Read Operations table for timing specifica-
tions and to the Read Operations Timings diagram for
the timing waveforms. I
table represents the active current specification for
reading array data.
8
Read
Write
CMOS Standby
TTL Standby
Output Disable
Hardware Reset
Temporary Sector Unprotect
(See Note)
“Reading Array Data”
IH
.
Operation
IL
, H = Logic High = V
CC1
for more information. Refer
in the DC Characteristics
Table 1. Am29F016D Device Bus Operations
IL
. CE# is the power
IH
, V
V
CC
ID
CE#
= 12.0 ± 0.5 V, X = Don’t Care, D
± 0.5 V
H
X
X
L
L
L
D A T A
Am29F016D
OE#
H
H
X
X
X
X
L
S H E E T
of the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. The appropriate device bus operations
table lists the inputs and control levels required, and the
resulting output. The following subsections describe
each of these operations in further detail.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
An erase operation can erase one sector, multiple sec-
tors, or the entire device. The Sector Address Tables
indicate the address space that each sector occupies.
A “sector address” consists of the address bits required
to uniquely select a sector. See the
tions”
entire chip, or suspending/resuming the erase
operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this
mode. Refer to the
Command Sequence”
I
tive current specification for the write mode. The “AC
Characteristics” section contains timing specification
tables and timing diagrams for write operations.
WE#
CC2
H
X
X
H
X
X
L
in the DC Characteristics table represents the ac-
section for details on erasing a sector or the
IL
V
, and OE# to V
IN
RESET#
CC
= Data In, D
V
± 0.5 V
H
H
H
H
L
ID
“Autoselect Mode”
sections for more information.
OUT
IH
.
A0–A20
= Data Out, A
21444E9 November 16, 2009
A
A
A
X
X
X
X
IN
IN
IN
“Command Defini-
and
IN
DQ0–DQ7
= Address In
“Autoselect
High-Z
High-Z
High-Z
High-Z
D
D
D
OUT
IN
IN