LFE2-12E-6QN208C LATTICE SEMICONDUCTOR, LFE2-12E-6QN208C Datasheet - Page 305

• Manufacturer Part Number: LFE2-12E-6QN208C
• Description: IC, LATTICEECP2 FPGA, 420MHZ, QFP-208
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeECP2r

Specifications of LFE2-12E-6QN208C

• No. Of Logic Blocks: 12000
• No. Of Macrocells: 6000
• No. Of Speed Grades: 6
• No. Of I/o's: 131
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Total Ram Bits: 221Kbit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LFE2M50E/SE and LFE2M70E/SE Logic Signal Connections: 900 fpBGA
Lattice Semiconductor
Number
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
*** These sysCONFIG pins are dedicated I/O pins for configuration. The outpus are actively driven during normal device operation.
****Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one con-
nection with a package ball or pin.
Ball
U22
N13
N18
V13
V18
J10
J20
J21
W9
R9
K9
J9
Function
Ball/Pad
VCCPLL
VCCPLL
VCCPLL
VCCPLL
PL2B
PL4A
PL4B
NC
NC
NC
NC
NC
LFE2M50E/SE
Bank
7
7
7
-
-
-
-
-
-
-
-
-
Dual Function
LDQ6
LDQ6
LDQ6
Differential
C (LVDS)*
C (LVDS)*
T (LVDS)*
4-205
Function
Ball/Pad
VCCPLL
VCCPLL
VCCPLL
VCCPLL
NC
NC
NC
NC
NC
NC
NC
NC
LatticeECP2/M Family Data Sheet
Bank
-
-
-
-
-
-
-
-
-
-
-
-
LFE2M70E/SE
Dual Function
Pinout Information
Differential