STA339BWS13TR STMicroelectronics, STA339BWS13TR Datasheet - Page 28

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STA339BWS13TR

Manufacturer Part Number
STA339BWS13TR
Description
DIG AUDIO SYSTEM, 2-CH, 36POWERSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA339BWS13TR

Svhc
No SVHC (15-Dec-2010)
No. Of Pins
36
Operating Temperature Range
-20°C To +70°C
Supply Voltage Max
21.5V
Supply Voltage Min
4.5V
Termination
RoHS Compliant
Package / Case
PowerSSO
Interface
I2C
Interface Type
I2C
Rohs Compliant
Yes

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Register description
28/76
Table 19.
To make the STA339BWS work properly, the serial audio interface LRCKI clock must be
synchronous to the PLL output clock. It means that:
If these two conditions are not met, and IDE bit (register 0x05, bit 2) is set to 1, the
STA339BWS immediately mutes the I
and it freezes any active processing task.
Clock desyncronization can happen during STA339BWS operation because of source
switching or TV channel change. To avoid audio side effects, like click or pop noise, it is
strongly recommended to complete the following actions:
1.
2.
while the serial audio interface and the internal PLL are still synchronous.
Delay serial clock enable
Table 20.
64 * fs
5
Bit
N-4< = (frequency of PLL clock) / (frequency of LRCKI) = < N+4 cycles,
where N depends on the settings in
the PLL must be locked.
soft volume change
I
2
C read /write instructions
R/W
BICKI
R/W
Supported serial audio input formats for LSB-first (SAIFB = 1) (continued)
Delay serial clock enable
0
RST
0000
0100
1000
1100
0001
0101
1001
1101
0010
0110
1010
1110
DSCKE
SAI [3:0]
Doc ID 15276 Rev 3
Name
1
1
1
1
1
1
1
1
1
1
1
1
2
S PCM data out (provided to the processing block)
SAIFB
Table 12 on page 25
0: no serial clock delay
1: serial clock delay by 1 core clock cycle to tolerate
anomalies in some I
I
I
I
LSB first I
Left-justified 24-bit data
Left-justified 20-bit data
Left-justified 18-bit data
Left-justified 16-bit data
Right-justified 24-bit data
Right-justified 20-bit data
Right-justified 18-bit data
Right-justified 16-bit data
2
2
2
S 24-bit data
S 20-bit data
S 18-bit data
2
S 16-bit data
Interface Format
Description
2
S master devices
STA339BWS

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