AD8330ACPZ-R2 Analog Devices Inc, AD8330ACPZ-R2 Datasheet

AD8330ACPZ-R2

Manufacturer Part Number

AD8330ACPZ-R2

Description

IC, VAR GAIN AMP, 150MHZ, 2DB, LFCSP-16

Manufacturer

Analog Devices Inc

Datasheet

1.AD8330-EVALZ.pdf (32 pages)

Specifications of AD8330ACPZ-R2

No. Of Amplifiers

Bandwidth

150MHz

Gain Accuracy

2dB

Rail To Rail I/o Type

Rail Rail Outputs

No. Of Channels

Supply Voltage Range

2.7V To 6V

Amplifier Case Style

LFCSP

Amplifier Type

Variable Gain

Number Of Circuits

Output Type

Differential, Rail-to-Rail

Slew Rate

1500 V/µs

-3db Bandwidth

150MHz

Current - Input Bias

100nA

Current - Supply

20mA

Voltage - Supply, Single/dual (±)

2.7 V ~ 6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

16-LFCSP

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With

AD8330-EVALZ - BOARD EVAL FOR AD8330

Current - Output / Channel

Gain Bandwidth Product

Voltage - Input Offset

Lead Free Status / RoHS Status

Lead free / RoHS Compliant, Lead free / RoHS Compliant

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FEATURES

Fully differential signal path, also used

Inputs from 0.3 mV to 1 V rms, rail-to-rail outputs

Differential R

Automatic offset compensation (optional)

Linear-in-dB and linear-in-magnitude gain modes

Inverted gain mode: 50 dB to 0 dB at −30 mV/dB

×0.03 to ×10 nominal gain for 15 mV < V

Constant bandwidth: 150 MHz at all gains

Low noise: 5 nV/√Hz typical at maximum gain

Low distortion: ≤−62 dBc typical

Low power: 20 mA typical at V

Available in a space-saving, 3 mm × 3 mm LFCSP package

APPLICATIONS

Pre-ADC signal conditioning

75 Ω cable driving adjust

AGC amplifiers

GENERAL DESCRIPTION

The AD8330 is a wideband variable gain amplifier for applications

requiring a fully differential signal path, low noise, well-defined

gain, and moderately low distortion, from dc to 150 MHz. The

input pins can also be driven from a single-ended source. The

peak differential input is ±2 V, allowing sine wave operation at

1 V rms with generous headroom. The output pins can drive

single-sided loads essentially rail-to-rail. The differential output

resistance is 150 Ω. The output swing is a linear function of the

voltage applied to the VMAG pin that internally defaults to 0.5 V,

providing a peak output of ±2 V. This can be raised to 10 V p-p,

limited by the supply voltage.

The basic gain function is linear-in-dB, controlled by the voltage

applied to Pin VDBS. The gain ranges from 0 dB to 50 dB for

control voltages between 0 V and 1.5 V—a slope of 30 mV/dB.

The gain linearity is typically within ±0.1 dB. By changing the

logic level on Pin MODE, the gain decreases over the same range,

with an opposite slope. A second gain control port is provided at

the VMAG pin and allows the user to vary the numeric gain from

a factor of 0.03 to 10. All the parameters of the AD8330 have low

sensitivities to temperature and supply voltages.

Rev. E

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

with single-sided signals

0 dB to 50 dB, for 0 V < V

= 1 kΩ; R

OUT

DBS

(each output) 75 Ω

< 1.5 V (30 mV/dB)

of 2.7 V to 6 V

MAG

< 5 V

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

Using VMAG, the basic 0 dB to 50 dB range can be reposi-

tioned to any value from 20 dB higher (that is, 20 dB to 70 dB)

to at least 30 dB lower (that is, –30 dB to +20 dB) to suit the

application, thereby providing an unprecedented gain range of

over 100 dB. A unique aspect of the AD8330 is that its bandwidth

and pulse response are essentially constant for all gains, over both

the basic 50 dB linear-in-dB range, but also when using the

linear-in-magnitude function. The exceptional stability of the

HF response over the gain range is of particular value in those

VGA applications where it is essential to maintain accurate gain

law-conformance at high frequencies.

An external capacitor at Pin OFST sets the high-pass corner of

an offset reduction loop, whose frequency can be as low as 5 Hz.

When this pin is grounded, the signal path becomes dc-coupled.

When used to drive an ADC, an external common-mode control

voltage at Pin CNTR can be driven to within 0.5 V of either ground

or V

the two outputs are positioned at the midpoint of the supply, V

Other features, such as two levels of power-down (fully off and a

hibernate mode), further extend the practical value of this excep-

tionally versatile VGA.

The AD8330 is available in 16-lead LFCSP and 16-lead QSOP

packages and is specified for operation from −40°C to +85°C.

to accommodate a wide variety of requirements. By default,

VPSI

INHI

INLO

MODE

Low Cost, DC to 150 MHz

VDBS

ENBL

FUNCTIONAL BLOCK DIAGRAM

Variable Gain Amplifier

GAIN INTERFACE

BIAS AND V

VGA CORE

CMGN

OFST

REF

Figure 1.

COMM

VPOS

CONTROL

OUTPUT

STAGES

CM AND

OFFSET

OUTPUT

CNTR

VMAG

CMOP

AD8330

OPLO

VPSO

www.analog.com

OPHI

/2.

Related parts for AD8330ACPZ-R2

AD8330ACPZ-R2 Summary of contents

Page 1

FEATURES Fully differential signal path, also used with single-sided signals Inputs from 0 rms, rail-to-rail outputs Differential kΩ; R (each output) 75 Ω IN OUT Automatic offset compensation (optional) Linear-in-dB and linear-in-magnitude gain ...

Page 2

AD8330 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configurations and Function Descriptions ...

Page 3

SPECIFICATIONS 25° OPHI and OPLO differential operation, unless otherwise noted. OFST Table 1. Parameter INPUT INTERFACE Full-Scale Input Input Resistance Input ...

Page 4

AD8330 Parameter CHIP ENABLE Logic Voltage for Full Shutdown Logic Voltage for Hibernate Mode Logic Voltage for Full Operation Current in Full Shutdown Current in Hibernate Mode 3 Minimum Time Delay POWER SUPPLY Supply Voltage Quiescent Current 1 The use ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Power Dissipation 1 RQ-16 Package CP-16-3 Package Input Voltage at Any Pin Storage Temperature Range θ JA RQ-16 Package CP-16-3 Package θ JC RQ-16 Package Operating Temperature Range Lead Temperature (Soldering 60 ...

Page 6

AD8330 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PIN 1 VPSI 1 INDICATOR AD8330 INHI 2 TOP VIEW INLO 3 (Not to Scale) MODE 4 NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND ...

Page 7

TYPICAL PERFORMANCE CHARACTERISTICS 25° DBS otherwise noted MODE 0.25 ...

Page 8

AD8330 4.8V MAG 40 1.52V 30 0.48V 20 0.15V 10 0.048V 0 0.015V –10 –20 –30 –40 100k 1M 10M FREQUENCY (Hz) Figure 10. Frequency Response for Various Values 0.75 V DBS 10 ...

Page 9

V = 1.5V DBS OFST: ENABLED DISABLED 0.75V DBS DBS –10 50k 10M FREQUENCY (Hz) Figure 16. CMRR vs. ...

Page 10

AD8330 1.5V DBS 100k 1M FREQUENCY (Hz) Figure 22. Input Referred Noise vs. Frequency 0.75V DBS p-p OUT – 1kΩ L –20 ...

Page 11

V (V) DBS Figure 28. Input V1dB Compression vs 10MHz 10 0 –10 –20 –30 – ...

Page 12

AD8330 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –50 – TIME (ns) Figure 34. Full-Scale Transient Response MHz p-p OUT 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –50 –25 0 ...

Page 13

OUTPUT INPUT 50mV Figure 40. Overdrive Response 1 DBS MAG 2V 1V Figure 41. ENBL Interface Response. Top Bottom: V ENBL – 0.75V DBS –20 –30 –40 V PSI –50 –60 ...

Page 14

AD8330 THEORY OF OPERATION CIRCUIT DESCRIPTION Many monolithic variable gain amplifiers use techniques that share common principles that are broadly classified as translinear. This term refers to circuit cells whose functions depend directly on the very predictable properties of bipolar ...

Page 15

Normal Operating Conditions To minimize confusion, normal operating conditions are defined as follows: The input pins are voltage driven (the source impedance is assumed to be zero). The output pins are open circuited (the load impedance is assumed to be ...

Page 16

AD8330 V DBS = The gain can be increased or decreased by changing the voltage applied to the VMAG pin. The internally set default value MAG of 500 mV is derived ...

Page 17

V IN 0.10 0.05 0 –0.05 –0.10 V MAG 1.2 1.0 0.8 0.6 0.4 0 OUT 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –400 –300 –200 –100 0 TIME (ns) Figure 50. Using VMAG in ...

Page 18

AD8330 –20 –40 –60 100k 10k 1k 100 10 1 0.001 0.01 0.1 V (V) GAIN Figure 52. Gain Control Function and Input Referred Noise Spectral Density over a 120 dB Range Noise, Input Capacity, ...

Page 19

Input Common-Mode Range and Rejection Ratio Input Pin INHI and Pin INLO should be ac-coupled in most applications to achieve the stated noise performance. In general, when direct coupling is used, care must be taken in setting the dc voltage ...

Page 20

AD8330 The gain calibration is specified for an open-circuited load, such as the high input resistance of an ADC. When resistively loaded, all gain values are nominally lowered as follows UNLOADED ( ) G LOADED + ...

Page 21

Connections to the input and output pins are not shown in Figure 57 because of the many options that are available. When the AD8330 is used to drive an ADC, connect the OPHI and OPLO pins directly to the differential ...

Page 22

AD8330 1.5V OFST: ENABLED DBS 0.75V DBS DBS –10 50k FREQUENCY (Hz) Figure 59. Input CMRR vs. ...

Page 23

Figure 62. Typical Pulse ...

Page 24

AD8330 Repeating the procedure NOISE 7.3 nV/√Hz The noise figure is the decibel representation of the noise factor commonly defined as ...

Page 25

APPLICATIONS INFORMATION The versatility of the AD8330, its very constant ac response over a wide range of gains, the large signal dynamic range, output swing, single supply operation, and low power consumption commend this VGA to a diverse variety of ...

Page 26

AD8330 33nF 10Ω ENBL OFST VPOS VPSI BIAS AND CM MODE AND V-REF OFFSET CONTROL 0.1µF INHI INPUT, OUTPUT VGA CORE 5mV TO 1V rms STAGES INLO OUTPUT MODE GAIN INTERFACE CONTROL VDBS CMGN COMM R1 0.1µF 10kΩ Figure 64. ...

Page 27

ENBL OFST VPOS CNTR AD8330 INPUT ...

Page 28

AD8330 EVALUATION BOARD GENERAL DESCRIPTION The AD8330-EVALZ is an easy-to-use accessory that enables a hands-on evaluation of the AD8330 variable gain amplifier (VGA). It includes test pins for connections to all of the functional device inputs. Figure ...

Page 29

OPTIONS Table 6 lists the jumpers on the board and their functions. Table 6. Functions of Jumpers Name Function FLTR Connects a high-pass filter to the offset control loop pin. This jumper is normally not installed. OFST Disables the offset ...

Page 30

AD8330 Figure 72. Component-Side Silkscreen Figure 73. Component-Side Wiring Figure 74. Ground Plane Figure 75. Wiring-Side Silkscreen Figure 76. Wiring-Side Pattern Figure 77. Inner Layer 2 Rev Page ...

Page 31

OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 0.90 0.85 0.80 SEATING PLANE 0.010 0.004 COPLANARITY 0.60 MAX 3.00 BSC SQ BOTTOM VIEW 0. 2.75 TOP BSC SQ EXPOSED VIEW 9 0.50 8 BSC 1.50 REF 0.80 MAX 0.65 ...

Page 32

... AD8330 ORDERING GUIDE 1 Model Temperature Range AD8330ACPZ-R2 −40°C to +85°C AD8330ACPZ-RL −40°C to +85°C AD8330ACPZ-R7 −40°C to +85°C AD8330ARQ −40°C to +85°C AD8330ARQ-REEL −40°C to +85°C AD8330ARQ-REEL7 −40°C to +85°C AD8330ARQZ −40°C to +85°C AD8330ARQZ-RL − ...

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