LIS331HHTR STMicroelectronics, LIS331HHTR Datasheet - Page 18
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LIS331HHTR
Manufacturer Part Number
LIS331HHTR
Description
ACCELEROMETER SENSOR 3AXIS 16-LG
Manufacturer
STMicroelectronics
Series
MEMS, nanor
Datasheet
1.STEVAL-MKI092V1.pdf
(37 pages)
Specifications of LIS331HHTR
Axis
X, Y, Z
Acceleration Range
±6g, 12g, 24g
Sensitivity
12mg/digit, 6mg/digit, 3mg/digit
Voltage - Supply
2.16 V ~ 3.6 V
Output Type
Digital
Bandwidth
50Hz ~ 1kHz Selectable
Interface
I²C, SPI
Mounting Type
Surface Mount
Package / Case
16-LGA
Package Type
LGA
Operating Supply Voltage (min)
2.16V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3mm
Product Height (mm)
1mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
16
Sensing Axis
X, Y, Z
Acceleration
6 g, 12 g, 24 g
Digital Output - Number Of Bits
16 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.16 V
Supply Current
10 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Digital Output - Bus Interface
I2C, SPI
Shutdown
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LIS331HHTR
Manufacturer:
APT
Quantity:
430
Part Number:
LIS331HHTR
Manufacturer:
ST
Quantity:
20 000
Digital interfaces
5.1.1
18/37
I
The transaction on the bus is started through a START (ST) signal. A START condition is
defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After
this has been transmitted by the Master, the bus is considered busy. The next byte of data
transmitted after the start condition contains the address of the slave in the first 7 bits and
the eighth bit tells whether the Master is receiving data from the slave or transmitting data to
the slave. When an address is sent, each device in the system compares the first seven bits
after a start condition with its address. If they match, the device considers itself addressed
by the Master.
The Slave ADdress (SAD) associated to the LIS331HH is 001100xb. SDO/SA0 pad can be
used to modify less significant bit of the device address. If SA0 pad is connected to voltage
supply, LSb is ‘1’ (address 0011001b) else if SA0 pad is connected to ground, LSb value is
‘0’ (address 0011000b). This solution permits to connect and address two different
accelerometers to the same I
Data transfer with acknowledge is mandatory. The transmitter must release the SDA line
during the acknowledge pulse. The receiver must then pull the data line LOW so that it
remains stable low during the HIGH period of the acknowledge clock pulse. A receiver which
has been addressed is obliged to generate an acknowledge after each byte of data
received.
The I
protocol must be adhered to. After the start condition (ST) a slave address is sent, once a
slave acknowledge (SAK) has been returned, a 8-bit sub-address (SUB) is transmitted: the
7 LSb represent the actual register address while the MSB enables address auto increment.
If the MSb of the SUB field is ‘1’, the SUB (register address) is automatically increased to
allow multiple data read/write.
The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (Write)
the Master will transmit to the slave with direction unchanged.
SAD+Read/Write bit pattern is composed, listing all the possible configurations.
Table 10.
Table 11.
2
C operation
Master
Slave
2
Command
C embedded inside the LIS331HH behaves like a slave device and the following
Read
Write
Read
Write
SAD+Read/Write patterns
Transfer when master is writing one byte to slave
ST
SAD + W
SAD[6:1]
001100
001100
001100
001100
2
C lines.
Doc ID 16366 Rev 1
SAK
SAD[0] = SA0
0
0
1
1
SUB
SAK
Table 10
R/W
1
0
1
0
DATA
00110001 (31h)
00110000 (30h)
00110011 (33h)
00110010 (32h)
explains how the
SAD+R/W
SAK
LIS331HH
SP