C8051F380DK Silicon Laboratories Inc, C8051F380DK Datasheet - Page 29

DEV KIT FOR C8051F380

C8051F380DK

Manufacturer Part Number
C8051F380DK
Description
DEV KIT FOR C8051F380
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F380DK

Processor To Be Evaluated
C8051F380
Processor Series
C8051F38x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-2012
29
Acknowledgement Handling
Software acknowledgement
Hardware acknowledgement
EHACK bit in register SMB0ADM is cleared to 0
Firmware on the device must detect incoming slave addresses and ACK or
NACK the slave address and incoming data bytes.
EHACK bit in register SMB0ADM is set to 1
Automatic slave address recognition and ACK generation is enabled in hardware
Transmit mode always interrupts after the ACK/NAK
Indicates a successful transfer
•Receiver—writing the ACK bit defines the outgoing ACK value
•Transmitter—reading the ACK bit indicates the value received during the last ACK
cycle
•Receiver—the value currently specified by the ACK bit will be automatically sent on
the bus during the ACK cycle of an incoming data byte
•Transmitter—reading the ACK bit indicates the value received on the last ACK cycle

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