CAT34TS02VP2GT4B ON Semiconductor, CAT34TS02VP2GT4B Datasheet - Page 3

• Manufacturer Part Number: CAT34TS02VP2GT4B
• Description: IC TEMP SENSOR 2KB MEM 8-TDFN
• Manufacturer: ON Semiconductor

Specifications of CAT34TS02VP2GT4B

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™, SPI™
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 2.97 V ~ 3.63 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-WFDFN Exposed Pad
• Digital Output - Bus Interface: I2C, SMBus
• Digital Output - Number Of Bits: 12 bit
• Supply Voltage (min): 3.3 V
• Description/function: Digital Output Temperature Sensor with On-board SPD EEPROM
• Maximum Operating Temperature: + 130 C
• Minimum Operating Temperature: - 45 C
• Supply Current: 500 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A.C. CHARACTERISTICS
V
PIN CAPACITANCE
T
Notes:
(1) Timing reference points are set at 30%, respectively 70% of V
(2) The TS interface will reset itself and will release the SDA line if the SCL line stays low beyond the t
(3) In a “Wired-OR” system (such as I
(4) The minimum t
(5) The first valid temperature recording can be expected after t
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
t
A
CC
Symbol
TIMEOUT
t
t
Symbol
SU:DAT
HD:DAT
F
t
t
t
= 25°C, V
SU:STA
HD:STA
SU:STO
t
t
t
t
the V
started (and then re-started) on every negative transition of SCL in the time interval between START and STOP. The minimum clock
frequency of 10 kHz is an SMBus recommendation; the minimum operating clock frequency for the CAT34TS02’s SPD component is DC,
while the minimum operating frequency for the TS component is limited only by the SMBus time-out.
able to sink the (external) bus pull-up current (in order to meet the V
than SDA rise time. SDA rise time can exceed the standard recommended t
where t
more capacitive bus or a larger bus pull-up resistor. At the minimum t
maximum SDA t
= 3.3 V ± 10%, T
SCL
t
t
HIGH
t
PU
LOW
C
R
BUF
F
T
WR
(3)
(3)
(5)
IN
i
(2)
(4)
(3)
IL
(2)
, V
LOW
OL
CC
Parameter
Clock Frequency
High Period of SCL Clock
Low Period of SCL Clock
SMBus SCL Clock Low Timeout
SDA and SCL Rise Time
SDA and SCL Fall Time
Data Setup Time
Data Hold Time (for Input Data)
Data Hold Time (for Output Data)
START Condition Setup Time
START Condition Hold Time
STOP Condition Setup Time
Bus Free Time Between STOP and START
Noise Pulse Filtered at SCL and SDA Inputs
Write Cycle Time
Power-up Delay to Valid Temperature Recording
Parameter
SDA, EVENT
Input Capacitance (other pins)
as well as the various timing limits.
and t
= 3.3 V, f = 1 MHz
SU:DAT
R
HD:DAT
of 300 ns. The CAT34TS02’s maximum t
¯¯¯¯¯¯ Pin Capacitance
of 100 ns is a limit recommended by standards. The CAT34TS02 will accept a t
A
are actual values (rather than spec limits). A shorter t
= −40°C to +125°C
(1)
2
C or SMBus), SDA rise time is determined by bus loading. Since each bus pull-down device must be
Test Conditions/Comments
V
V
HD:DAT
IN
IN
PU
= 0
= 0
CC
at nominal supply voltage.
, as illustrated in Figure 4. Bus loading must be such as to allow meeting
is <700 ns, thus allowing for an SDA t
3
LOW
IL
and/or V
spec limit of 1300 ns, the maximum t
HD:DAT
R
limit, as long as it does not exceed t
OL
limits), it follows that SDA fall time is inherently faster
leaves more room for a longer SDA t
1300
1300
Min
600
100
300
600
600
600
10
25
0
SU:DAT
R
TIMEOUT
Min
of up to 500 ns at minimum t
of 0 ns.
limit. The time-out count is
HD:DAT
Max
400
900
100
300
300
100
35
5
of 900 ns demands a
Max
LOW
Doc. No. MD-1129 Rev. H
8
6
CAT34TS02
R
- t
, allowing for a
HD:DAT
Units
kHz
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
- t
Unit
pF
pF
SU:DAT
LOW
.
,