PIC18F26K80-I/SP Microchip Technology, PIC18F26K80-I/SP Datasheet - Page 451
![MCU PIC 64KB FLASH 28SDIP](/photos/18/99/189989/4243185_sml.jpg)
PIC18F26K80-I/SP
Manufacturer Part Number
PIC18F26K80-I/SP
Description
MCU PIC 64KB FLASH 28SDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F26K80-I/SP
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F26K80-I/SP
Manufacturer:
MICROCHIP
Quantity:
2 000
- Current page: 451 of 628
- Download datasheet (6Mb)
27.9.1
The microcontroller clock frequency generated from a
PLL circuit is subject to a jitter, also defined as Phase
Jitter or Phase Skew. For its PIC18 Enhanced micro-
controllers, Microchip specifies phase jitter ( P
being 2% (Gaussian distribution, within 3 standard
deviations, see Parameter F13 in
Jitter ( T
FIGURE 27-5:
Once these considerations are taken into account, it is
possible to show that the relation between the jitter and
the total frequency error can be defined as:
where jitter is expressed in terms of time and NBT is the
Nominal Bit Time.
2011 Microchip Technology Inc.
jitter
Nominal Clock
Clock with Jitter
CAN Bit Time
with Jitter
) as being 2 * P
EXTERNAL CLOCK, INTERNAL
CLOCK AND MEASURABLE JITTER
IN HS-PLL BASED OSCILLATORS
f
=
----------------------- -
10 NBT
T
jitter
EFFECTS OF PHASE JITTER ON THE MICROCONTROLLER CLOCK
AND CAN BIT TIME
jitter
=
.
----------------------- -
10 NBT
2 P
Table
jitter
31-7) and Total
jitter
) as
Preliminary
Phase Skew (Jitter)
CAN Bit Jitter
PIC18F66K80 FAMILY
The CAN protocol uses a bit-stuffing technique that
inserts a bit of a given polarity following five bits with the
opposite polarity. This gives a total of 10 bits transmit-
ted without resynchronization (compensation for jitter
or phase error).
Given the random nature of the added jitter error, it can
be shown that the total error caused by the jitter tends
to cancel itself over time. For a period of 10 bits, it is
necessary to add only two jitter intervals to correct for
jitter induced error: one interval in the beginning of the
10-bit period and another at the end. The overall effect
is shown in
For example, assume a CAN bit rate of 125 Kb/s, which
gives an NBT of 8 µs. For a 16 MHz clock generated
from a 4x PLL, the jitter at this clock frequency is:
and resultant frequency error is:
2
-------------------------------------- -
10
2%
1.25
Figure
8
10
-------------------
16 MHz
10
6 –
1
9 –
27-5.
=
=
3.125
-----------------
16
0.02
10
10
6
–
5
=
=
DS39977C-page 451
1.25ns
0.0031%
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