PIC18F26K80-I/SP Microchip Technology, PIC18F26K80-I/SP Datasheet - Page 228
![MCU PIC 64KB FLASH 28SDIP](/photos/18/99/189989/4243185_sml.jpg)
PIC18F26K80-I/SP
Manufacturer Part Number
PIC18F26K80-I/SP
Description
MCU PIC 64KB FLASH 28SDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F26K80-I/SP
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F26K80-I/SP
Manufacturer:
MICROCHIP
Quantity:
2 000
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PIC18F66K80 FAMILY
15.2
Timer2 can also generate an optional device interrupt.
The Timer2 output signal (TMR2 to PR2 match) provides
the input for the four-bit output counter/postscaler. This
counter generates the TMR2 match interrupt flag, which
is latched in TMR2IF (PIR1<1>). The interrupt is enabled
by setting the TMR2 Match Interrupt Enable bit, TMR2IE
(PIE1<1>).
A range of 16 postscaler options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS<3:0> (T2CON<6:3>).
FIGURE 15-1:
TABLE 15-1:
DS39977C-page 228
INTCON
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
PMD1
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used by the Timer2 module.
Name
T2OUTPS<3:0>
T2CKPS<1:0>
F
OSC
/4
Timer2 Interrupt
Timer2 Register
Timer2 Period Register
GIE/GIEH
PSPMD
PSPIF
PSPIE
PSPIP
Bit 7
—
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
TIMER2 BLOCK DIAGRAM
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
PEIE/GIEL
CTMUMD
Internal Data Bus
1:1, 1:4, 1:16
2
Prescaler
ADIE
ADIP
ADIF
Bit 6
TMR0IE
ADCMD
RC1IE
RC1IP
RC1IF
Bit 5
4
TMR2
Preliminary
Reset
8
TMR4MD
INT0IE
TX1IF
TX1IE
TX1IP
Bit 4
15.3
The unscaled output of TMR2 is available primarily to
the ECCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can optionally be used as the shift clock source
for the MSSP module operating in SPI mode.
Additional information is provided in
“Master Synchronous Serial Port (MSSP) Module”
Comparator
1:1 to 1:16
Postscaler
TMR3MD
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
8
TMR2/PR2
Match
Timer2 Output
TMR1GIF
TMR1GIE
TMR1GIP
TMR2MD
TMR2ON
TMR0IF
Bit 2
2011 Microchip Technology Inc.
PR2
8
T2CKPS1
TMR1MD
TMR2IF
TMR2IE
TMR2IP
INT0IF
Bit 1
Set TMR2IF
TMR2 Output
(to PWM or MSSP)
Section 21.0
T2CKPS0
TMR0MD
TMR1IF
TMR1IE
TMR1IP
RBIF
Bit 0
.
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