PCF2127AT/1,518 NXP Semiconductors, PCF2127AT/1,518 Datasheet - Page 25

• Manufacturer Part Number: PCF2127AT/1,518
• Description: IC RTC/CALENDAR TCXO QTZ 20SOIC
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2127AT/1,518

• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Time Format: HH:MM:SS (12/24 hr)
• Memory Size: 512B
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 4.2 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Serial Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
• Rtc Memory Size: 512 bytes
• Supply Voltage (max): 4.2 V
• Supply Voltage (min): 1.8 V
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 2600 nA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PCF2127A_2
Product data sheet
8.7 Oscillator stop detection function
The PCF2127A has an on-chip oscillator detection circuit which monitors the status of the
oscillation: whenever the oscillation stops, a reset occurs and the oscillator stop flag OSF
(in register Seconds) is set logic 1.
Fig 13. Power failure event due to battery discharge: reset occurs
•
•
V
(= 2.5 V)
(= 1.2 V)
th(sw)bat
Power-on:
a. The oscillator is not running, the chip is in reset (pin RST is LOW and flag OSF is
b. When the oscillator starts running and is stable after power-on, the chip exits from
c. The flag OSF is still logic 1 and can be cleared (OSF set logic 0) via the interface.
Power supply failure:
a. When the power supply of the chip (V
b. When the power supply returns to normal operation, the oscillator starts running
c. The flag OSF is still logic 1 and can be cleared (OSF set logic 0) via the interface.
(1) Theoretical state of the signals since there is no power.
(2) The oscillator stop flag (OSF), set logic 1, indicates that the oscillation has stopped and a reset has
V
OSF
V
V
V
BAT
logic 1).
reset (pin RST is HIGH).
(V
again, the chip exits from reset.
DD
low
SS
low
occurred since the flag was last cleared (OSF set logic 0). In this case the integrity of the clock
information is not guaranteed. The OSF flag is cleared using the interface.
), typically 1.2 V, the oscillator stops running and a reset occurs.
V
All information provided in this document is subject to legal disclaimers.
BBS
V
BBS
V
BBS
Rev. 02 — 7 May 2010
battery discharge
DD
Integrated RTC, TCXO and quartz crystal
or V
internal power supply
BAT
(1)
V
) drops below a certain value
BBS
PCF2127A
© NXP B.V. 2010. All rights reserved.
V
V
V
BAT
DD
SS
(2)
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