A3P250-VQG100 Actel, A3P250-VQG100 Datasheet - Page 47
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A3P250-VQG100
Manufacturer Part Number
A3P250-VQG100
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet
1.A3P1000-FGG144.pdf
(218 pages)
Specifications of A3P250-VQG100
Processor Series
A3P250
Core
IP Core
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
157
Data Ram Size
36864
Delay Time
11.1 ns
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3P250-VQG100
Manufacturer:
NXP
Quantity:
3 400
Part Number:
A3P250-VQG100
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Company:
Part Number:
A3P250-VQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3P250-VQG100I
Manufacturer:
ACTEL
Quantity:
20 000
Company:
Part Number:
A3P250-VQG100T
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-39 • Minimum and Maximum DC Input and Output Levels
Figure 2-6 • AC Loading
Table 2-40 • AC Waveforms, Measuring Points, and Capacitive Loads
3.3 V LVTTL /
3.3 V LVCMOS
Drive Strength
2 mA
4 mA
6 mA
8 mA
Notes:
1. I
2. I
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Input Low (V)
0
*
Measuring point = Vtrip. See
larger when operating outside recommended ranges
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
Applicable to Standard I/O Banks
Test Point
Datapath
Min.
–0.3
–0.3
–0.3
–0.3
V
V
IL
Max.
0.8
0.8
0.8
0.8
V
Table 2-22 on page 2-22
35 pF
Input High (V)
Min.
V
2
2
2
2
3.3
V
IH
Enable Path
Max.
Test Point
3.6
3.6
3.6
3.6
V
R = 1 k
Max.
for a complete table of trip points.
V
0.4
0.4
0.4
0.4
V
R e v i s i o n 9
OL
Measuring Point* (V)
Min.
V
2.4
2.4
2.4
2.4
R to VCCI for t
R to GND for t
35 pF for t
5 pF for t
V
OH
1.4
mA mA
I
OL
2
4
6
8
HZ
ZH
I
OH
/ t
2
6
4
8
/ t
LZ
HZ
LZ
ZHS
/ t
/ t
Max.
mA
I
ZL
ZH
OSL
/ t
25
25
51
51
ZL
ProASIC3 Flash Family FPGAs
/ t
3
/ t
ZLS
ZHS
/ t
ZLS
C
LOAD
Max.
mA
I
OSH
27
27
54
54
35
3
(pF)
µA
I
10
10
IL
10
10
1
4
µA
I
2- 33
10
10
IH
10
10
2
4