APA300-PQ208I Actel, APA300-PQ208I Datasheet - Page 74

• Manufacturer Part Number: APA300-PQ208I
• Description: FPGA - Field Programmable Gate Array 300K System Gates
• Manufacturer: Actel

Specifications of APA300-PQ208I

• Processor Series: APA300
• Core: IP Core
• Maximum Operating Frequency: 5 MHz
• Number Of Programmable I/os: 158
• Data Ram Size: 73728
• Supply Voltage (max): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Development Tools By Supplier: APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.3 V
• Number Of Gates: 300 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Synchronous Write and Asynchronous Read to the Same Location
Note: The plot shows the normal operation status.
Figure 2-37 • Synchronous Write and Asynchronous Read to the Same Location
Table 2-61 • T
2 -6 4
Symbol t
ORDA
ORDH
OWRA
OWRH
RAWCLKS
RAWCLKH
Notes:
1. During an asynchronous read cycle, each write operation (synchronous or asynchronous) to the same location will automatically
2. Violation of RAWCLKS will disturb access to OLD data.
3. Violation of RAWCLKH will disturb access to NEWER data.
ProASIC
trigger a read operation which updates the read data.
PLUS
xxx
T
J
J
RB, RADDR
Flash Family FPGAs
= 0°C to 110°C; V
= –55°C to 150°C, V
New DO access from RB ↓
Old DO valid from RB ↓
New DO access from WCLKS ↓
Old DO valid from WCLKS ↓
RB ↓ or RADDR from WCLKS ↑
RB ↑ or RADDR from WCLKS ↓
WCLKS
t
RAWCLKS
t
t
DO
ORDH
ORDA
DD
Description
DD
= 2.3 V to 2.7 V for Commercial/Industrial
= 2.3 V to 2.7 V for Military/MIL-STD-883
OLD
v5.9
Min.
7.5
3.0
5.0
5.0
t
OWRH
t
Max.
OWRA
3.0
0.5
NEWNEWER
Units
t
RAWCLKH
ns
ns
ns
ns
ns
ns
Notes