APA300-PQ208I Actel, APA300-PQ208I Datasheet - Page 133

• Manufacturer Part Number: APA300-PQ208I
• Description: FPGA - Field Programmable Gate Array 300K System Gates
• Manufacturer: Actel

Specifications of APA300-PQ208I

• Processor Series: APA300
• Core: IP Core
• Maximum Operating Frequency: 5 MHz
• Number Of Programmable I/os: 158
• Data Ram Size: 73728
• Supply Voltage (max): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Development Tools By Supplier: APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.3 V
• Number Of Gates: 300 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Number
Pin
R15
R16
R17
R18
R19
R20
R21
R22
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
U1
U2
U3
U4
U5
U6
T1
T2
T3
T4
T5
T6
T7
T8
T9
484-Pin FBGA
Function
APA450
RCK
V
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DD
Function
APA600
RCK
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DD
Number
Pin
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
U7
U8
U9
V1
V2
V3
V4
V5
V6
V7
V8
V9
484-Pin FBGA
Function
APA450
TRST
GND
GND
TDO
TCK
v5.9
V
V
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PN
PP
Function
APA600
TRST
GND
GND
TDO
TCK
V
V
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PN
PP
Number
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
Pin
V21
V22
Y10
Y11
Y12
W1
W2
W3
W4
W5
W6
W7
W8
W9
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
ProASIC
484-Pin FBGA
PLUS
Function
APA450
GND
GND
V
GND
TMS
V
V
NC
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
Flash Family FPGAs
DD
DD
Function
APA600
GND
GND
V
GND
TMS
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DD
DD
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