AGL600V2-FGG144 Actel, AGL600V2-FGG144 Datasheet - Page 233
![FPGA - Field Programmable Gate Array 600K System Gates](/photos/16/15/161502/landingpageacteligloofpga_sml.jpg)
AGL600V2-FGG144
Manufacturer Part Number
AGL600V2-FGG144
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL600V2-FGG144
Processor Series
AGL600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
97
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGL600V2-FGG144
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
AGL600V2-FGG144I
Manufacturer:
ACTEL
Quantity:
101
Company:
Part Number:
AGL600V2-FGG144I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Revision
Advance v0.6
(November 2007)
Advance v0.5
(September 2007)
Advance v0.4
(September 2007)
Advance v0.3
(August 2007)
Advance v0.2
Table 1 • IGLOO Product Family, the "I/Os Per Package1" table, and the
"IGLOO Ordering Information", and the Temperature Grade Offerings table were
updated to add the UC81 package.
The "81-Pin µCSP" table for the AGL030 device is new.
The "81-Pin CSP" table for the AGL030 device is new.
Table 1 • IGLOO Product Family was updated for AGL030 in the Package Pins
section to change CS181 to CS81.
Cortex-M1 device information was added to Table 1 • IGLOO Product Family,
the "I/Os Per Package1" table, "IGLOO Ordering Information", and Temperature
Grade Offerings.
The number of single-ended I/Os for the CS81 package for AGL030 was updated
to 66 in the "I/Os Per Package1" table.
The "Power Conservation Techniques" section was updated to recommend that
unused I/O signals be left floating.
In Table 1 • IGLOO Product Family, the CS81 package was added for AGL030.
The CS196 was replaced by the CS121 for AGL060. Table note 3 was moved to
the specific packages to which it applies for AGL060: QN132 and FG144.
The CS81 and CS121 packages were added to the "I/Os Per Package1" table.
The number of single-ended I/Os was removed for the CS196 package in
AGL060. Table note 6 was moved to the specific packages to which it applies for
AGL060: QN132 and FG144.
The CS81 and CS121 packages were added to the Temperature Grade Offerings
table. The temperature grade offerings were removed for the CS196 package in
AGL060. Table note 3 was moved to the specific packages to which it applies for
AGL060: QN132 and FG144.
The CS81 and CS121 packages were added to Table 2-31 • Flash*Freeze Pin
Location in IGLOO Family Packages (device-independent).
The words "ambient temperature" were added to the temperature range in the
"IGLOO Ordering Information", Temperature Grade Offerings, and "Speed Grade
and Temperature Grade Matrix" sections.
The T
changed to T
J
parameter in Table 3-2 • Recommended Operating Conditions was
A
, ambient temperature, and table notes 4–6 were added.
R ev i si o n 1 8
Changes
IGLOO Low Power Flash FPGAs
i, ii, iii, iv
i, ii, iii, iv
Page
2-51
2-61
iii, iv
4-1
4-3
3-2
iv
ii
ii
i
i
4 -7
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