AGL125V2-QNG132 Actel, AGL125V2-QNG132 Datasheet - Page 57
AGL125V2-QNG132
Manufacturer Part Number
AGL125V2-QNG132
Description
FPGA - Field Programmable Gate Array 125K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL125V2-QNG132
Processor Series
AGL125
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
84
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
125 K
Package / Case
QFN-132
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 2-50 • 3.3 V LVTTL / 3.3 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Table 2-51 • 3.3 V LVTTL / 3.3 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Table 2-52 • 3.3 V LVTTL / 3.3 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Drive Strength
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Note:
Drive Strength
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive Strength
4 mA
6 mA
8 mA
12 mA
16 mA
Note:
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Timing Characteristics
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Commercial-Case Conditions: T
Applicable to Standard Plus Banks
Applies to 1.5 V DC Core Voltage
Speed Grade t
Speed Grade t
Speed Grade
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
DOUT
0.97
0.97
0.97
0.97
0.97
0.97
DOUT
0.97
0.97
0.97
0.97
0.97
t
DOUT
0.97
0.97
0.97
0.97
0.97
0.97
4.47 0.18 0.85
3.74 0.18 0.85
3.74 0.18 0.85
3.23 0.18 0.85
3.08 0.18 0.85
3.00 0.18 0.85
3.94 0.18 0.85
3.24 0.18 0.85
3.24 0.18 0.85
2.76 0.18 0.85
2.76 0.18 0.85
t
t
2.73 0.18 0.85
2.32 0.18 0.85
2.32 0.18 0.85
2.09 0.18 0.85
2.05 0.18 0.85
2.07 0.18 0.85
DP
DP
t
DP
J
J
J
t
t
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
DIN
DIN
t
DIN
t
t
PY
PY
R ev i si o n 1 8
t
PY
t
t
EOUT
0.66
0.66
0.66
0.66
0.66
0.66
EOUT
0.66
0.66
0.66
0.66
0.66
t
0.66
0.66
0.66
0.66
0.66
0.66
EOUT
Table 2-6 on page 2-7
4.56 3.89 2.24 2.19
3.82 3.37 2.49 2.63
3.82 3.37 2.49 2.63
3.30 2.98 2.66 2.91
3.14 2.89 2.70 2.99
3.06 2.91 2.74 3.27
4.02 3.46 1.98 2.03
3.31 2.99 2.21 2.42
3.31 2.99 2.21 2.42
2.82 2.63 2.36 2.68
2.82 2.63 2.36 2.68
t
t
ZL
ZL
2.79 2.22 2.25 2.32 6.38 5.82
2.37 1.85 2.50 2.76 5.96 5.45
2.37 1.85 2.50 2.76 5.96 5.45
2.14 1.68 2.67 3.05 5.73 5.27
2.10 1.64 2.70 3.12 5.69 5.24
2.12 1.60 2.75 3.41 5.71 5.20
t
ZL
Table 2-6 on page 2-7
Table 2-6 on page 2-7
t
t
ZH
ZH
t
ZH
t
t
LZ
LZ
t
LZ
IGLOO Low Power Flash FPGAs
t
t
for derating values.
HZ
HZ
t
HZ
8.15
7.42
7.42
6.89
6.74
6.66
7.62
6.90
6.90
6.42
6.42
t
t
ZLS
ZLS
for derating values.
for derating values.
t
ZLS
7.48
6.96
6.96
6.57
6.48
6.50
7.05
6.59
6.59
6.22
6.22
t
t
t
ZHS
ZHS
ZHS
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 43
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