AGL125V2-QNG132 Actel, AGL125V2-QNG132 Datasheet - Page 108
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AGL125V2-QNG132
Manufacturer Part Number
AGL125V2-QNG132
Description
FPGA - Field Programmable Gate Array 125K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL125V2-QNG132
Processor Series
AGL125
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
84
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
125 K
Package / Case
QFN-132
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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IGLOO DC and Switching Characteristics
Figure 2-21 • Input DDR Timing Model
Table 2-162 • Parameter Definitions
2- 94
Parameter Name
t
t
t
t
t
t
t
t
DDRICLKQ1
DDRICLKQ2
DDRISUD
DDRIHD
DDRICLR2Q1
DDRICLR2Q2
DDRIREMCLR
DDRIRECCLR
CLK
Data
CLR
DDR Module Specifications
Input DDR Module
INBUF
CLKBUF
INBUF
Clock-to-Out Out_QR
Clock-to-Out Out_QF
Data Setup Time of DDR input
Data Hold Time of DDR input
Clear-to-Out Out_QR
Clear-to-Out Out_QF
Clear Removal
Clear Recovery
A
B
C
Parameter Definition
Input DDR
R ev i sio n 1 8
DDR_IN
FF1
FF2
Measuring Nodes (from, to)
D
E
C, D
B, D
B, E
A, B
A, B
C, E
C, B
C, B
Out_QF
(to core)
Out_QR
(to core)
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