WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 30

• Manufacturer Part Number: WM8776SEFT/V
• Description: Audio CODECs Stereo CODEC with 5-Ch Mux
• Manufacturer: Wolfson Microelectronics

Specifications of WM8776SEFT/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8776
Table 12 Headphone Attenuation Register Map
w
(both channels)
Output Right
Power Down
Headphone
Attenuation
Headphone
Attenuation
Headphone
Attenuation
REGISTER
Output Left
ADDRESS
R13 (0Dh)
Analogue
Analogue
Analogue
R2 (02h)
0000010
0001101
R0 (00h)
0000000
R1 (01h)
0000001
Master
3
BIT
6:0
6:0
6:0
7
8
7
8
7
8
HPRZCEN
HPMASTA
HPLZCEN
UPDATEA
HPLA[6:0]
HPLA[6:0]
UPDATE
UPDATE
MZCEN
ANALOGUE OUTPUT VOLUME CONTROLS
There are analogue volume controls for the headphone outputs which may be adjusted
independently using separate volume control registers.
Each analogue headphone output channel has a PGA which can be used to attenuate the output
from that channel. The PGA’s can be powered up or down using the HPPD bit. Attenuation is 0dB by
default but can be set between +6dB and –73dB in 1dB steps using the two Attenuation control
words. The attenuation registers are double latched allowing them to be updated in pairs. Setting the
UPDATE bit on an attenuation write to one channel, for example HPOUTL, will cause the pre-latched
value in HPOUTR to be applied to the PGA. A master attenuation register is also included, allowing
both volume levels to be set to the same value in a single write.
Note: The UPDATE bit is not latched. If UPDATE=0, the Attenuation value will be written to the pre-
latch but not applied to the PGA. If UPDATE=1, pre-latched values will be applied from the next input
sample. Writing to HPMASTA[6:0] overwrites any values previously sent to HPLA[6:0] and
HPRA[6:0].
The analogue output PGAs are controlled by the HPLA and HPRA registers. Register bits MASTA
can be used to control attenuation of both channels.
Table 13 shows how the attenuation levels are selected from the 7-bit words.
LABEL
HEADPHONE OUTPUT PGA ATTENUATION
HPPD
[6:0]
Not latched
Not latched
Not latched
DEFAULT
1111001
1111001
1111001
(0dB)
(0dB)
(0dB)
0
0
0
1
Attenuation data for Headphone Left channel in 1dB steps. See
Table 13
Headphone left zero cross detect enable
Controls simultaneous update of Headphone Attenuation Latches
Attenuation data for Headphone Right channel in 1dB steps. See
Table 13
Headphone right zero cross detect enable
Controls simultaneous update of Headphone Attenuation Latches
Attenuation data for both Headphone channels in 1dB steps. See
Table 13
Master zero cross detect enable
Controls simultaneous update of Attenuation Latches
Headphone output/PGA Power Down
0 : HP out enabled
1 : HP out disabled
0: Store HPLA in intermediate latch (no change to output)
1: Store HPLA and update attenuation on both channels.
0: Store HPRA in intermediate latch (no change to output)
1: Store HPRA and update attenuation on both channels.
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
0: zero cross disabled
1: zero cross enabled
0: zero cross disabled
1: zero cross enabled
0: zero cross disabled
1: zero cross enabled
DESCRIPTION
PD, Rev 4.1, September 2008
Production Data
30