WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 29

• Manufacturer Part Number: WM8776SEFT/V
• Description: Audio CODECs Stereo CODEC with 5-Ch Mux
• Manufacturer: Wolfson Microelectronics

Specifications of WM8776SEFT/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
w
DIGITAL ATTENUATOR CONTROL MODE
Setting the ATC register bit causes the left channel attenuation settings to be applied to both left and
right channel DACs from the next audio input sample. No update to the attenuation registers is
required for ATC to take effect.
INFINITE ZERO DETECT ENABLE
Setting the IZD register bit will enable the internal infinite zero detect function:
With IZD enabled, applying 1024 consecutive zero input samples to the DAC will cause both DAC
outputs to be muted. Mute will be removed as soon as any channel receives a non-zero input.
DAC OUTPUT CONTROL
The DAC output control word determines how the left and right inputs to the audio Interface are
applied to the left and right DACs:
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
DAC Channel Control
DAC Channel Control
Powerdown Control
DAC Control
R13 (0Dh)
0001101
R7 (07h)
0000111
R7 (07h)
0000111
R7 (07h)
0000111
BIT
BIT
BIT
BIT
7:4
6
1
2
LABEL
LABEL
LABEL
PL[3:0]
LABEL
AINPD
ATC
IZD
DEFAULT
DEFAULT
DEFAULT
DEFAULT
1001
0
0
0
Attenuator Control Mode:
Infinite zero Mute Enable
PL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Analogue input PGA disable:
0 : Right channel use Right
1:
0 : disable infinite zero mute
1: enable infinite zero Mute
0 : Normal Mode
1: Power Down Mode
PD, Rev 4.1, September 2008
attenuation
Right Channel use Left
Attenuation
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
Left
Output
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
WM8776
Right
Output
Mute
Mute
Mute
Mute
Left
Left
Left
Left
Right
Right
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
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