DS90UB902QSQE/NOPB National Semiconductor, DS90UB902QSQE/NOPB Datasheet - Page 21

• Manufacturer Part Number: DS90UB902QSQE/NOPB
• Description: IC SER/DESER 10-43MHZ 16B 40-LLP
• Manufacturer: National Semiconductor

Specifications of DS90UB902QSQE/NOPB

• Function: Deserializer
• Data Rate: 688Mbps
• Input Type: CML
• Output Type: LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 1
• Voltage - Supply: 1.71 V ~ 1.89 V, 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90UB902QSQE/NOPBTR

(Hex)
Addr
10
11
C
D
5
6
7
8
9
A
B
E
F
GPIO[0] Config
GPIO[1] Config
GPIO[2] Config
GPIO[3] Config
GPIO[4] Config
Detect Status
I
PCLK Detect
CRC Check
2
CRC Errors
CRC Errors
Cable Link
C Bus Rate
Reserved
Reserved
Reserved
Slave ID
DES ID
Name
Bits
7:0
7:1
7:1
7:0
7:0
7:0
7:0
7:3
7:4
3:2
7:4
3:2
7:4
3:2
7:4
3:2
7:4
3:2
0
0
2
1
0
1
0
1
0
1
0
1
0
1
0
Field
I
DES DEV ID
RESERVED
SLAVE DEV ID
RESERVED
RESERVED
RESERVED
CRC ERROR B0
CRC ERROR B1
RESERVED
PCLK DETECT
DES ERROR
LINK DETECT
RESERVED
RESERVED
GPIO0 DIR
GPIO0 EN
RESERVED
RESERVED
GPIO1 DIR
GPIO1 EN
RESERVED
RESERVED
GPIO2 DIR
GPIO2 EN
RESERVED
RESERVED
GPIO3 DIR
GPIO3 EN
RESERVED
RESERVED
GPIO4 DIR
GPIO4 EN
2
C BUS RATE
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
21
Default
0xC0'h
0001'b
0000'b
0000'b
0000'b
0000'b
0x40'h
0x00'h
0x00'h
0x01'h
0x00'h
0x00'h
0x00'h
00'b
00'b
00'b
00'b
00'b
0
0
0
0
1
0
1
1
1
1
1
1
1
Description
I
f
0x40'h = ~100 kHz SCL (default)
Note: Register values <0x32'h are NOT supported.
Deserializer Device ID = 0x60'h
(1100_000X'b) default
Reserved
Slave Device ID. Sets remote slave I
Reserved
Reserved
Reserved
Number of CRC errors - 8 LSBs
Number of CRC errors - 8 MSBs
Reserved
1: Valid PCLK detected
0: Valid PCLK not detected
1: CRC error during communication with Deserializer
0: Cable link not detected
1: Cable link detected
Reserved
Reserved
0: Output
1: Input
0: TRI-STATE
1: Enabled
Reserved
Reserved
0: Output
1: Input
0: TRI-STATE
1: Enabled
Reserved
Reserved
0: Output
1: Input
0: TRI-STATE
1: Enabled
Reserved
Reserved
0: Output
1: Input
0: TRI-STATE
1: Enabled
Reserved
Reserved
0: Output
1: Input
0: TRI-STATE
1: Enabled
2
SCL
C SCL frequency is determined by the following:
= 6.25 MHz / Register value (in decimal)
2
C address.
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