DS92LX1621SQX/NOPB National Semiconductor, DS92LX1621SQX/NOPB Datasheet - Page 28

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DS92LX1621SQX/NOPB

Manufacturer Part Number
DS92LX1621SQX/NOPB
Description
IC SERIALIZER 10-50MHZ 32LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS92LX1621SQX/NOPB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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SLAVE CLOCK STRETCHING
In order to communicate and synchronize with remote de-
vices on the I
slave clock stretching must be supported by the I
controller/MCU. The chipset utilizes bus clock stretching
(holding the SCL line low) during data transmission; where
the I
every I
device will not control the clock and only stretches it until the
remote peripheral has responded; which is typically in the or-
der of 12 μs (typical).
2
C slave pulls the SCL line low prior to the 9th clock of
2
C data transfer (before the ACK signal). The slave
2
C bus through the bi-directional control channel,
FIGURE 24. START and STOP Conditions
FIGURE 23. Basic Operation
2
C master
FIGURE 22. Read Byte
28
CAD PIN ADDRESS DECODER
The CAD pin is used to decode and set the physical slave
address of the Serializer/Deserializer (I
six devices on the bus using only a single pin. The pin sets
one of six possible addresses for each Serializer/Deserializer
device. The pin must be pulled to VDD (1.8V, NOT VDDIO))
with a 10 kΩ resistor and a pull down resistor (RID) of the
recommended value to set the physical device address. The
recommended maximum resistor tolerance is 0.1% worst
case (0.2% total tolerance).
30123042
2
C only) to allow up to
30123041
30123010

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