KSZ8873MLLI Micrel Inc, KSZ8873MLLI Datasheet - Page 55

IC ETHERNET SWITCH 3PORT 64LQFP

KSZ8873MLLI

Manufacturer Part Number
KSZ8873MLLI
Description
IC ETHERNET SWITCH 3PORT 64LQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8873MLLI

Controller Type
Ethernet Switch Controller
Interface
MII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8873MLLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873MLLI
0
Micrel, Inc.
Register 14 (0x0E): Global Control 12
Register 15 (0x0F): Global Control 13
September 2009
Bit
7
6
5
4
3
2-0
Bit
7-3
2-0
Unknown
Packet
Default
Port
Enable
Drive
Strength
of I/O Pad
Reserved
P3
SMTXC
invert for
Turbo MII
Reserved
Packet
Default
Port
PHY
Address
Name
Unknown
Name
Reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
Description
00000 : N/A
00001 : Port 1 PHY address is 0x1
00010 : Port 1 PHY address is 0x2
11101 : Port 1 PHY address is 0x29
11110 : N/A
11111 : N/A
Note:
Port 2 PHY address = (Port 1 PHY address) + 1
Reserved
Do not change the default values.
Reserved
Reserved
Description
Send packets with unknown destination MAC addresses to specified
port(s) in bits [2:0] of this register.
=0, Disable
=1, Enable
=1, 16mA
=0, 8mA
Do not change the default values.
=1, P3 smtxc inverted
=0, Not inverted
Do not change the default values.
Specify which port(s) to send packets with unknown destination MAC
addresses. This feature is enabled by bit [7] of this register.
An ‘1’ includes a port.
An ‘0’ excludes a port.
Bit 2 stands for port 3.
Bit 1 stands for port 2.
Bit 0 stands for port 1.
55
KSZ8873MLL/FLL/RLL
Default
00001
000
Default
0
1
0
0
0
111
M9999-092309-1.2

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