PK60X256VLQ100 Freescale Semiconductor, PK60X256VLQ100 Datasheet - Page 60

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PK60X256VLQ100

Manufacturer Part Number
PK60X256VLQ100
Description
IC ARM CORTEX MCU 256K 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheet

Specifications of PK60X256VLQ100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
Peripherals
DMA, I²S, LVD, POR, PWM, WDT
Number Of I /o
100
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 33x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PK60X256VLQ100
Manufacturer:
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Quantity:
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Part Number:
PK60X256VLQ100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Peripheral operating requirements and behaviors
60
DSPI_PCSn
DSPI_SCK
(CPOL=0)
DSPI_SIN
DSPI_SOUT
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
Num
DS1
DS2
DS3
DS4
DS5
DS6
DS7
DS8
DS9
Table 41. Master mode DSPI timing (high-speed mode) (continued)
DSPI_SCK output cycle time
DSPI_SCK output high/low time
DSPI_PCSn to DSPI_SCK output valid
DSPI_SCK to DSPI_PCSn output hold
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSIP_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Table 42. Slave mode DSPI timing (high-speed mode)
Figure 26. DSPI classic SPI timing — master mode
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
DS7
DS3
First data
Description
Description
DS8
First data
DS5
DS2
Preliminary
Data
Data
DS6
DS1
Last data
Last data
(t
(t
(t
(t
2 x t
SCK
SCK
SCK
4 x t
SCK
TBD
Min.
Min.
2.7
−2
/2) − 2
/2) − 2
/2) − 2
/2) − 2
0
0
2
7
DS4
BCLK
BCLK
Freescale Semiconductor, Inc.
(t
(t
SCK
SCK
Max.
Max.
TBD
12.5
8.5
3.6
14
14
/2) + 2
/2 + 2
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V

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