PK60X256VLQ100 Freescale Semiconductor, PK60X256VLQ100 Datasheet - Page 13

• Manufacturer Part Number: PK60X256VLQ100
• Description: IC ARM CORTEX MCU 256K 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr

Specifications of PK60X256VLQ100

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
• Peripherals: DMA, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 33x16b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

1. All functional non-supply pins are internally clamped to V
5.1.2 LVD and POR operating requirements
Freescale Semiconductor, Inc.
Symbol
V
V
V
V
V
V
V
V
V
Symbol
V
V
V
V
I
limited to the value specified.
V
LVW1H
LVW2H
LVW3H
LVW4H
V
RFVBAT
IC
LVW1L
LVW2L
LVW3L
LVW4L
V
t
HYSH
LVDH
HYSL
LVDL
LPO
POR
I
RAM
BG
IC
maximum operating requirement should not be exceeded. If this requirement cannot be met, the input must be current
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
Low-voltage warning thresholds — high range
Low-voltage inhibit reset/recover hysteresis —
high range
Falling low-voltage detect threshold — low range
(LVDV=00)
Low-voltage warning thresholds — low range
Low-voltage inhibit reset/recover hysteresis —
low range
Bandgap voltage reference
Internal low power oscillator period
factory trimmed
Description
DC injection current — single pin
DC injection current — total MCU limit, includes sum
of all stressed pins
V
V
Description
Table 1. Voltage and current operating requirements (continued)
DD
BAT
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
• V
• V
voltage required to retain RAM
Table 2. V
voltage required to retain the VBAT register file
IN
IN
< V
< V
SS
SS
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
DD
supply LVD and POR operating requirements
Preliminary
SS
, and induce an injection current when V
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Min.
TBD
Min.
1.2
0
0
1000
2.56
2.70
2.80
2.90
3.00
1.60
1.80
1.90
2.00
2.10
1.00
Typ.
1.1
60
40
Max.
–0.2
–5
—
—
Max.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
IN
Unit
mA
mA
V
V
is less than V
Unit
mV
mV
μs
V
V
V
V
V
V
V
V
V
V
V
V
Notes
Notes
General
SS
1
1
1
1
. The
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