EFM32G890F64 Energy Micro, EFM32G890F64 Datasheet - Page 85

• Manufacturer Part Number: EFM32G890F64
• Description: MCU 32BIT 64KB FLASH 112-BGA
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G890F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 8x12b, D/A 2x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LFBGA
• Processor Series: EFM32G890
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.3.1.4 EM3
10.3.1.5 EM4
10.3.2 Entering a Low Energy Mode
10.3.3 Leaving a Low Energy Mode
2010-09-06 - d0001_Rev1.00
• The low frequency oscillator and clock trees are active
• Low frequency peripheral functionality (RTC, Watchdog, LCD, LEUART, I
• Wakeup through peripheral interrupt or asynchronous pin interrupt
• RAM and register values are preserved
• Both high and low frequency oscillators and clock trees are inactive
• Wakeup through asynchronous pin interrupts, I
• Watchdog enabled when 1 kHz clock has been selected
• All other peripheral functionality is disabled
• RAM and register values are preserved
• All oscillators and regulators are inactive
• RAM and register values are not preserved
• Wakeup from external pin reset
A low energy mode is entered by first configuring the desired Energy Mode through the EMU_CTRL
control register and the SLEEPDEEP bit in the Cortex-M3 System Control Register, see Table 10.2 (p.
85) . A Wait For Interrupt (WFI) or Wait For Event (WFE) instruction from the Cortex-M3 triggers the
transition into a low energy mode.
The transition into a low energy mode can optionally be delayed until the lowest priority Interrupt Service
Routine (ISR) is exited, if the SLEEPONEXIT bit in the Cortex-M3 System Control Register is set.
Entering the lowest energy mode, EM4, is done by writing a sequence to the EM4CTRL bitfield in
the EMU_CTRL register. Writing a zero to the EM4CTRL bitfield will restart the power sequence.
EM2BLOCK prevents the EMU to enter EM2 or lower, and it will instead enter EM1.
EM3 is equal to EM2, except that the LFACLK/LFBCLK are disabled in EM3. The LFACLK/LFBCLK
must be disabled by the user before entering low energy mode.
The EMVREG bit in EMU_CTRL can be used to prevent the voltage regulator from being turned off in
low energy modes. The device will then essentially stay in EM1 when entering a low energy mode.
Table 10.2. EMU Entering a Low Energy Mode
(‘x’ means don’t care)
In each low energy mode a selection of peripheral units are available, and software can either enable or
disable the functionality. Enabled interrupts that can cause wakeup from a low energy mode is shown
in Table 10.3 (p. 86) . Additionally, any reset source will return to EM0.
Low Energy Mode
EM1
EM2
EM4
available
EM4CTRL
0
0
Write sequence:
2, 3, 2, 3, 2, 3, 2,
3, 2
EMVREG
x
0
x
...the world's most energy friendly microcontrollers
2
85
C address recognition or ACMP edge interrupt
EM2BLOCK
x
0
x
SLEEPDEEP
0
1
x
2
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C, LETIMER, PCNT) is
Cortex-M3
Instruction
WFI or WFE
WFI or WFE
x