ST16C554DCQ-0A-EB Exar Corporation, ST16C554DCQ-0A-EB Datasheet - Page 4

• Manufacturer Part Number: ST16C554DCQ-0A-EB
• Description: EVAL BOARD FOR ST16C554D 64TQFP
• Manufacturer: Exar Corporation

Specifications of ST16C554DCQ-0A-EB

• Interface Type: UART
• Data Bus Width: 8 bit
• For Use With/related Products: ST16C554D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Description
ST16C554/554D
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO
MODEM OR SERIAL I/O INTERFACE
TXRDY#
RXRDY#
INTSEL
RTSC#
RTSD#
CTSC#
CTSD#
RTSA#
RTSB#
CTSA#
CTSB#
(IRQ#)
(N.C.)
N
INTC
INTD
INTA
INTB
RXA
RXB
RXC
RXD
TXA
TXB
TXC
TXD
AME
64-LQFP
P
12
37
43
10
39
41
62
20
29
51
13
36
44
16
33
47
IN
6
8
5
2
-
-
-
#
68-PLCC
P
15
21
49
55
65
39
38
17
19
51
53
29
41
63
14
22
48
56
25
45
59
11
IN
7
#
T
(OD)
YPE
O
O
O
O
O
O
I
I
I
When 16/68# pin is HIGH for Intel bus interface, this ouput becomes channel A
interrupt output. The output state is defined by the user and through the soft-
ware setting of MCR[3]. INTA is set to the active mode when MCR[3] is set to a
logic 1. INTA is set to the three state mode when MCR[3] is set to a logic 0
(default). See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this output becomes device
interrupt output (active low, open drain). An external pull-up resistor is required
for proper operation.
When 16/68# pin is HIGH for Intel bus interface, these ouputs become the inter-
rupt outputs for channels B, C, and D. The output state is defined by the user
through the software setting of MCR[3]. The interrupt outputs are set to the
active mode when MCR[3] is set to a logic 1 and are set to the three state mode
when MCR[3] is set to a logic 0 (default). See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, these outputs are unused
and will stay at logic zero level. Leave these outputs unconnected.
Interrupt Select (active high, input with internal pull-down).
When 16/68# pin is HIGH for Intel bus interface, this pin can be used in conjunc-
tion with MCR bit-3 to enable or disable the INT A-D pins or override MCR bit-3
and enable the interrupt outputs. Interrupt outputs are enabled continuously
when this pin is HIGH. MCR bit-3 enables and disables the interrupt output
pins. In this mode, MCR bit-3 is set to a logic 1 to enable the continuous output.
See MCR bit-3 description for full detail. This pin must be LOW in the Motorola
bus interface mode. For the 64 pin packages, this pin is bonded to VCC inter-
nally in the ST16C554DCQ64 so the INT outputs operate in the continuous
interrupt mode. This pin is bonded to GND internally in the ST16C554CQ64 and
therefore requires setting MCR bit-3 for enabling the interrupt output pins.
Transmitter Ready (active low). This output is a logically ANDed status of
TXRDY# A-D. See
Receiver Ready (active low). This output is a logically ANDed status of RXRDY#
A-D. See
UART channels A-D Transmit Data and infrared transmit data. In this mode, the
TX signal will be HIGH during reset, or idle (no data).
UART channel A-D Receive Data. Normal receive data input must idle HIGH.
UART channels A-D Request-to-Send (active low) or general purpose output. If
these outputs are not used, leave them unconnected.
UART channels A-D Clear-to-Send (active low) or general purpose input. These
inputs should be connected to VCC when not used.
Table
5. If this output is unused, leave it unconnected.
4
Table
5. If this output is unused, leave it unconnected.
D
ESCRIPTION
REV. 4.0.1