ST16C450CQ48-F Exar Corporation, ST16C450CQ48-F Datasheet - Page 4

IC UART SINGLE 48TQFP

ST16C450CQ48-F

Manufacturer Part Number
ST16C450CQ48-F
Description
IC UART SINGLE 48TQFP
Manufacturer
Exar Corporation
Type
UARTsr
Datasheet

Specifications of ST16C450CQ48-F

Package / Case
48-TQFP
Features
*
Number Of Channels
1, UART
Fifo's
1 Byte
Voltage - Supply
2.97 V ~ 5.5 V
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
1.5 Mbps
Supply Current
3 mA
Maximum Operating Temperature
0 C
Minimum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Operating Supply Voltage
7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST16C450CQ48-F
Manufacturer:
EXAR
Quantity:
1 400
Part Number:
ST16C450CQ48-F
Manufacturer:
Exar Corporation
Quantity:
10 000
ST16C450
SYMBOL DESCRIPTION
A0
A1
A2
IOR
CS0
CS1
IOW
-AS
D0-D7
GND
-CS2
Symbol
Rev. 4.20
1-8
40
27
26
22
12
13
14
19
25
28
20
Pin
2-9
44
31
30
29
25
14
15
16
21
28
22
43-47
2-4
48
28
27
26
20
10
11
17
24
18
9
Signal
type
Pwr
I/O
I
I
I
I
I
I
I
I
I
Address-0 Select Bit Internal registers address selection.
Address-1 Select Bit Internal registers address selection.
Address-2 Select Bit Internal registers address selection.
Read data strobe. Its function is the same as -IOR (see -
IOR), except it is active high. Either an active -IOR or IOR
is required to transfer data from 16C450 to CPU during a
read operation.
Chip Select-0. Logical 1 on this pin provides the chip select-
0 function.
Chip Select-1. Logical 1 on this pin provides the chip select-
1 function.
Chip Select -2. Logical 0 on this pin provides the chip select-
2 function.
Write data strobe. Its function is the same as -IOW (see -
IOW), but it acts as an active high input signal. Either -IOW
or IOW is required to transfer data from the CPU to
ST16C450 during a write operation.
Address Strobe. A logic 0 transition on -AS latches the state
of the chip selects and the register select bits, A0-A2. This
input is used when address and chip selects are not stable
for the duration of a read or write operation, i.e., a micropro-
cessor that needs to de-multiplex the address and data bits.
If not required, the -AS input can be permanently tied to a
logic 0 (it is edge triggered).
Data Bus (Bi-directional) - These pins are the eight bit, tri-
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.
Signal and Power Ground.
4
Pin Description

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