CPV364M4KPBF Vishay, CPV364M4KPBF Datasheet - Page 8
![IGBT SIP MODULE 600V 13A IMS-2](/photos/14/29/142934/vs-cpv363m4u_sml.jpg)
CPV364M4KPBF
Manufacturer Part Number
CPV364M4KPBF
Description
IGBT SIP MODULE 600V 13A IMS-2
Manufacturer
Vishay
Specifications of CPV364M4KPBF
Configuration
Three Phase Inverter
Voltage - Collector Emitter Breakdown (max)
600V
Vce(on) (max) @ Vge, Ic
1.8V @ 15V, 24A
Current - Collector (ic) (max)
24A
Current - Collector Cutoff (max)
250µA
Input Capacitance (cies) @ Vce
1.6nF @ 30V
Power - Max
63W
Input
Standard
Ntc Thermistor
No
Mounting Type
Through Hole
Package / Case
19-SIP (13 Leads), IMS-2
Collector- Emitter Voltage Vceo Max
600 V
Maximum Gate Emitter Voltage
+/- 20 V
Continuous Collector Current At 25 C
24 A
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 55 C
Mounting Style
Through Hole
Dc Collector Current
24A
Collector Emitter Voltage Vces
600V
Power Dissipation Pd
63W
Collector Emitter Voltage V(br)ceo
600V
Operating Temperature Range
-55°C To +150°C
No. Of Pins
13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Igbt Type
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
*CPV364M4K
CPV364M4K
CPV364M4K
VS-CPV364M4K
VS-CPV364M4K
VS-CPV364M4KPBF
VS-CPV364M4KPBF
VSCPV364M4K
VSCPV364M4K
CPV364M4K
CPV364M4K
VS-CPV364M4K
VS-CPV364M4K
VS-CPV364M4KPBF
VS-CPV364M4KPBF
VSCPV364M4K
VSCPV364M4K
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CPV364M4KPBF
Manufacturer:
RENESAS
Quantity:
101
CPV364M4K
Fig. 18c -
I
LM
Fig. 18a -
V c c
80%
of Vce
, E
td( on)
1 0% +V g
10% Ic
on
, E
Test Waveforms for Circuit of Fig. 18a,
off(diode)
t1
Test Circuit for Measurement of
Defining E
V ce
tr
, t
430µF
rr
, Q
5% Vc e
9 0% Ic
on
rr
, I
, t
G ATE VO LTA G E D .U .T.
rr
+V g
d(on)
, t
d(on)
Same t ype
device as
D.U.T.
, t
D.U.T.
r
, t
t2
E on =
Ipk
DUT V O LTA G E
AN D C URR E NT
r
, t
d(off)
t1
V c e ie dt
t2
Ic
, t
f
Fig. 18b -
Fig. 18d -
+ Vg e
Ic
Test Waveforms for Circuit of Fig. 18a, Defining
V pk
td (off)
DIO D E RE V E RS E
RE C O V ER Y EN ER G Y
Ic
10 % Vc e
10% V cc
tx
Test Waveforms for Circuit of Fig. 18a,
Defining E
t1
Irr
E
off
, t
V ce
d(off)
t3
90% Vge
Ic
trr
rec
, t
tf
, t
f
rr
, Q
t2
90% Ic
DIO DE RE CO V E RY
W AV E FO RM S
t4
rr
Er ec =
, I
E off =
10 % Ir r
rr
5% Ic
Q rr =
t3
V d id d t
t4
t1
V ce ic d t
tx
t1 +5µ S
id dt
trr
V cc