SLRC40001T/OFE,112 NXP Semiconductors, SLRC40001T/OFE,112 Datasheet - Page 16
SLRC40001T/OFE,112
Manufacturer Part Number
SLRC40001T/OFE,112
Description
IC I.CODE SLRC400 READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
I-Coder
Datasheets
1.SLRC40001TOFE112.pdf
(130 pages)
2.SLRC40001TOFE112.pdf
(132 pages)
3.SLRC40001TOFE112.pdf
(101 pages)
Specifications of SLRC40001T/OFE,112
Rf Type
Read Only
Frequency
13.56MHz
Features
ISO15693, ISO18000-3
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1124-5
935269551112
SLRC400
SLRC41TOFED
935269551112
SLRC400
SLRC41TOFED
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Philips Semiconductors
I•CODE Reader IC
5
5.1
Page
SL RC400 REGISTER SET
SL RC400 Registers Overview
Address
1C
1D
1A
1B
1E
1F
10
11
12
13
14
15
16
17
18
19
C
D
0
1
2
3
4
5
6
7
8
9
A
B
E
F
hex
ModConductance
SecondaryStatus
CwConductance
CRCResultMSB
Register Name
DecoderControl
CRCResultLSB
ModWidthSOF
ClockQControl
PrimaryStatus
CoderControl
RxThreshold
FIFOLength
TimerValue
InterruptEn
InterruptRq
RxControl1
RxControl2
Command
ModWidth
FIFOData
TxControl
PreSet1D
PreSet0F
ErrorFlag
PreSet17
BitPhase
Control
Collpos
Page
Page
Page
Page
controls decoder behaviour and defines the input source for the receiver
selects the conductance of the antenna driver pins TX1 and TX2 during
selects the width of the modulation pulse for SOF (I•CODE Fast-Mode)
controls the logical behaviour of the antenna driver pins TX1 and TX2
controls clock generation for the 90° phase shifted Q-channel clock
error flags showing the error status of the last command executed
status flags of the receiver and transmitter and of the FIFO buffer
selects the conductance of the antenna driver pins TX1 and TX2
Selects the bit coding mode and the framing during transmission
control bits to enable and disable passing of interrupt requests
bit position of the first bit collision detected on the RF-interface
selects the bit-phase between transmitter and receiver clock
16
diverse control flags e.g.: timer, power saving
starts (and stops) the command execution
selects the width of the modulation pulse
MSB of the CRC-Coprocessor register
LSB of the CRC-Coprocessor register
number of bytes buffered in the FIFO
selects thresholds for the bit decoder
in- and output of 64 byte FIFO buffer
these values shall not be changed
these values shall not be changed
these values shall not be changed
controls decoder behaviour
controls receiver behaviour
selects the register page
selects the register page
selects the register page
selects the register page
actual value of the timer
Product Specification Rev. 3.1 August 2004
interrupt request flags
diverse status flags
modulation
Function
SL RC400
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