RFPIC12F675F-I/SS Microchip Technology, RFPIC12F675F-I/SS Datasheet - Page 11

IC MCU 1KX14 RF FSK/ASK 20SSOP

RFPIC12F675F-I/SS

Manufacturer Part Number
RFPIC12F675F-I/SS
Description
IC MCU 1KX14 RF FSK/ASK 20SSOP
Manufacturer
Microchip Technology
Series
PIC®r
Datasheets

Specifications of RFPIC12F675F-I/SS

Package / Case
20-SSOP
Frequency
380MHz ~ 450MHz
Applications
RKE, Security Systems
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
40 kbps
Power - Output
10dBm
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
Voltage - Supply
2V ~ 5.5V
Operating Temperature
-40°C ~ 125°C
Processor Series
RFPIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DV164102, AC164101, AC164103
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
1.75 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164103 - MODULE RCVR RFPIC 433MHZAC164101 - MODULE TRANSMITTER RFPIC 433MHZDV164102 - KIT DEV RFPICKIT KIT 1AC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3188156

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RFPIC12F675F-I/SS
Manufacturer:
MCP
Quantity:
181
Part Number:
RFPIC12F675F-I/SS
Manufacturer:
MICROCHIP
Quantity:
12 000
2.2.2.1
The STATUS register, shown in Register 2-1, contains:
• the arithmetic status of the ALU
• the RESET status
• the bank select bits for data memory (SRAM)
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
REGISTER 2-1:
 2003 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS Register
STATUS — STATUS REGISTER (ADDRESS: 03h OR 83h)
bit 7
IRP: This bit is reserved and should be maintained as ‘0’
RP1: This bit is reserved and should be maintained as ‘0’
RP0: Register Bank Select bit (used for direct addressing)
1 = Bank 1 (80h - FFh)
0 = Bank 0 (00h - 7Fh)
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
For borrow, the polarity is reversed.
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Reserved Reserved
Legend:
R = Readable bit
- n = Value at POR
Note:
IRP
For borrow the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low order bit of the source register
RP1
R/W-0
RP0
Preliminary
W = Writable bit
’1’ = Bit is set
R-1
TO
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect any STATUS bits. For other instructions not
affecting any STATUS bits, see the “Instruction Set
Summary”.
Note 1: Bits IRP and RP1 (STATUS<7:6>) are not
2: The C and DC bits operate as a Borrow
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R-1
PD
used by the rfPIC12F675 and should be
maintained as clear. Use of these bits is
not recommended, since this may affect
upward compatibility with future products.
and Digit Borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
R/W-x
rfPIC12F675
Z
x = Bit is unknown
R/W-x
DC
DS70091A-page 9
R/W-x
C
bit 0

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