ATR2434-PLT Atmel, ATR2434-PLT Datasheet - Page 24

• Manufacturer Part Number: ATR2434-PLT
• Description: IC RADIO TXRX 2.4GHZ ISM 48QFN
• Manufacturer: Atmel

Specifications of ATR2434-PLT

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: Gaming Devices, General Remote Control, HID
• Power - Output: -0.5dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 68mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -

Table 27. Receive Signal Strength Indicator (RSSI)
Table 28. Power Control
Table 29. Crystal Adjust
24
Note:
Bit
7:6
5
4:0
Bit
7:3
2:0
Bit
7
6
5:0
Reserved
7
7
7
Name
Reserved
Clock Output
Disable
Crystal Adjust
The RSSI will collect a single value each time the part is put into receive mode via Control register (Reg 0x03, bit 7 = 1).
Addr: 0x22
Addr: 0x23
Addr: 0x24
ATR2434 [Preliminary]
Name
Reserved
Valid
RSSI
Name
Reserved
PA Bias
Reserved
Clock Output
Disable
6
6
6
Description
These bits are reserved. This register is read-only.
The Valid bit indicates whether the RSSI value in bits [4:0] are valid. This register is read only.
1 = RSSI value is valid
0 = RSSI value is invalid
The Receive Strength Signal Indicator (RSSI) value indicates the strength of the received signal. This is a
read only value with the higher values indicating stronger received signals meaning more reliable
transmissions.
Description
These bits are reserved and should be written with zeros.
The Power Amplifier Bias (PA Bias) bits are used to set the transmit power of the IC through increasing
(values up to 7) or decreasing (values down to 0) the gain of the on-chip Power Amplifier. The higher the
register value the higher the transmit power. By changing the PA Bias value signal strength management
functions can be accomplished. For general purpose communication a value of 7 is recommended.
Description
This bit is reserved and should be written with zero.
The Clock Output Disable bit disables the 13 MHz clock driven on the X13OUT pin.
1 = No 13 MHz clock driven externally
0 = 13 MHz clock driven externally
If the 13 MHz clock is driven on the X13OUT pin then receive sensitivity will be reduced by -4 dBm on
channels 5+13n. By default the 13 MHz clock output pin is enabled. This pin is useful for adjusting the
13 MHz clock, but it interferes with every 13th channel beginning with 2.405 GHz channel. Therefore, it is
recommended that the 13 MHz clock output pin be disabled when not in use.
The Crystal Adjust value is used to calibrate the on-chip load capacitance supplied to the crystal. The
Crystal Adjust value will depend on the parameters of the crystal being used. Refer to the appropriate
reference material for information about choosing the optimum Crystal Adjust value.
Reserved
Valid
5
5
5
REG_CRYSTAL_ADJ
4
4
4
REG_RSSI
REG_PA
3
3
3
Crystal Adjust
RSSI
2
2
2
PA Bias
1
1
1
Default: 0x00
Default: 0x00
Default: 0x00
4822D–ISM–10/04
0
0
0