AT86RF231-ZFR Atmel, AT86RF231-ZFR Datasheet - Page 58

• Manufacturer Part Number: AT86RF231-ZFR
• Description: TXRX LOW POWER 2.4GHZ 32VQFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZFR

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: AT86RF231-ZFR; AT86RF231-ZFRTR

7.2.3.3
8111C–MCU Wireless–09/09
Configuration of non IEEE 802.15.4 Compliant Scenarios
Sniffer
Table 7-9 on page 58
RX_AACK configuration bits, refer to
All frames received are indicated by an IRQ_2 (RX_START) and IRQ_3 (TRX_END). After
frame reception register bit RX_CRC_VALID (register 0x06, PHY_RSSI) is updated with the
result of the FCS check (see
RX_CRC_VALID bit needs to be checked in order to dismiss corrupted frames.
Table 7-9.
This operating mode is similar to the promiscuous mode.
Reception of Reserved Frames
In RX_AACK mode, frames with reserved frame types, refer to
Field (FCF)” on page
etary, non-standard compliant, protocols. It is an extension of the address filtering in RX_AACK
mode. Received frames are either handled similar to data frames, or may be allowed to com-
pletely bypass the address filter.
Table 7-10 on page 58
Figure 7-9 on page 53
Table 7-10.
0x20,0x21
0x22,0x23
Register
Address
Register
Address
...........
0x24,
0x0C
0x2C
0x2E
0x2B
0x17
0x17
0x17
Register
Register
Configuration of a Sniffer Device
RX_AACK Configuration to Receive Reserved Frame Types
Bits
Bits
4
7
5
0
1
4
80, can also be handled. This might be required when implementing propri-
shows the corresponding flow chart.
shows the required configuration for a node to receive reserved frames,
shows an RX_AACK configuration to setup a sniffer device. Other
Register Name
AACK_PROM_MODE
AACK_DIS_ACK
Register Name
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
........
IEEE_ADDR_7
RX_SAFE_MODE
AACK_UPLD_RES_FT
AACK_FLTR_RES_FT
SLOTTED_OPERATION
Section 8.2 “Frame Check Sequence (FCS)” on page
Table 7-5 on page
Description
1: Enable promiscuous Mode
1: Disable generation of acknowledgment
Description
Set node addresses
0: disable frame protection
1: enable frame protection
1: Enable reserved frame type reception
Filter reserved frame types like data frame type,
see note below
0: disable
1: enable
0: if transceiver works in unslotted mode
1: if transceiver works in slotted mode
54, should be set to their reset values.
Section 8.1.2.2 “Frame Control
AT86RF231
85). The
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