AT86RF231-ZFR Atmel, AT86RF231-ZFR Datasheet - Page 121

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AT86RF231-ZFR

Manufacturer Part Number
AT86RF231-ZFR
Description
TXRX LOW POWER 2.4GHZ 32VQFN
Manufacturer
Atmel
Datasheet

Specifications of AT86RF231-ZFR

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
12.3 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
AT86RF231-ZFR
AT86RF231-ZFRTR
9.7
9.7.1
9.7.2
9.7.3
9.7.4
8111C–MCU Wireless–09/09
Frequency Synthesizer (PLL)
Overview
RF Channel Selection
Frequency Agility
Calibration Loops
The main PLL features are:
The PLL generates the RF frequencies for the AT86RF231. During receive operation the fre-
quency synthesizer works as a local oscillator on the radio transceiver receive frequency, during
transmit operation the voltage-controlled oscillator (VCO) is directly modulated to generate the
RF transmit signal. The frequency synthesizer is implemented as a fractional-N PLL.
Two calibration loops ensure correct PLL functionality within the specified operating limits.
The PLL is designed to support 16 channels in the 2.4 GHz ISM band with a channel spacing of
5 MHz according to IEEE 802.15.4. The center frequency of these channels is defined as
follows:
F
where k is the channel number.
The channel k is selected by register bits CHANNEL (register 0x08, PHY_CC_CA).
When the PLL is enabled during state transition from TRX_OFF to PLL_ON, the settling time is
typically t
calibration, refer to
indicated with an interrupt IRQ_0 (PLL_LOCK).
Switching between 2.4 GHz ISM band channels in PLL_ON or RX_ON states is typically done
within t
applications.
When starting the transmit procedure the PLL frequency is changed to the transmit frequency
within a period of t
settles back to the receive frequency within a period of t
not generate an interrupt IRQ_0 (PLL_LOCK) or IRQ_1 (PLL_UNLOCK) within these periods.
Due to variation of temperature, supply voltage and part-to-part variations of the radio trans-
ceiver the VCO characteristics may vary.
To ensure a stable operation, two automated control loops are implemented, center frequency
(CF) tuning and delay cell (DCU) calibration. Both calibration loops are initiated automatically
when the PLL is enabled during state transition from TRX_OFF to PLL_ON state. Additionally,
center frequency calibration is initiated when the PLL changes to a different channel center
frequency.
c
• Generate RX/TX frequencies for all IEEE 802.15.4 - 2.4 GHz channels
• Autonomous calibration loops for stable operation within the operating range
• Two PLL-interrupts for status indication
• Fast PLL settling to support frequency hopping
= 2405 + 5 (k - 11) in [MHz], for k = 11, 12,..., 26
TR20
TR4
= 11 µs. This makes the radio transceiver highly suitable for frequency hopping
= 110 µs, including settling of the analog voltage regulator (AVREG) and PLL self
TR23
Table 7-2 on page 43
= 16 µs before starting the transmission. After the transmission the PLL
and
Figure 13-13 on page
TR24
= 32 µs. This frequency step does
168. A lock of the PLL is
AT86RF231
121

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