AT86RF231-ZF Atmel, AT86RF231-ZF Datasheet - Page 127
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AT86RF231-ZF
Manufacturer Part Number
AT86RF231-ZF
Description
TXRX LOW POWER 2.4GHZ 32VQFN
Manufacturer
Atmel
Datasheet
1.AT86RF231-ZUR.pdf
(198 pages)
Specifications of AT86RF231-ZF
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
12.3 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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10.2
8111C–MCU Wireless–09/09
Frame Transmit Procedure
A frame transmission comprises of two actions, a Frame Buffer write access and the transmis-
sion of the Frame Buffer content. Both actions can be run in parallel if required by critical
protocol timing.
Figure 10-2 on page 127
the frame consecutively. After a Frame Buffer write access, the frame transmission is initiated by
asserting pin 11 (SLP_TR) or writing command TX_START to register 0x02 (TRX_STATE),
while the radio transceiver is in state PLL_ON or TX_ARET_ON. The completion of the transac-
tion is indicated by interrupt IRQ_3 (TRX_END).
Figure 10-2. Transaction between AT86RF231 and Microcontroller during Transmit
Alternatively a frame transmission can be started first, followed by the Frame Buffer write access
(PSDU data); refer to
Initiating a transmission, either by asserting pin 11 (SLP_TR) or command TX_START to regis-
ter bits TRX_CMD (register 0x02, TRX_STATE), the radio transceiver starts transmitting the
SHR, which is internally generated.
This first phase requires 16 µs for PLL settling and 160 µs for SHR transmission. The PHR must
be available in the Frame Buffer before this time elapses. Furthermore the SPI data rate must be
higher than the PHY data rate selected by register bits OQPSK_DATA_RATE (register 0x0C,
TRX_CTRL_2) to ensure that no Frame Buffer under run occurs, indicated by IRQ_6 (TRX_UR),
refer to
Figure 10-3. Time Optimized Frame Transmit Procedure
Section 11.3 “High Data Rate Modes” on page
Write TRX_CMD = TX_START, or assert pin 11 (SLP_TR)
Write TRX_CMD = TX_START, or assert pin 11 (SLP_TR)
Figure 10-3 on page
Read IRQ_STATUS register, pin 24 (IRQ) deasserted
Read IRQ_STATUS register, pin 24 (IRQ) deasserted
illustrates the frame transmit procedure, when writing and transmitting
Write frame data (Frame Buffer access)
Write frame data (Frame Buffer access)
IRQ_3 (TRX_END) issued
IRQ_3 (TRX_END) issued
127. This is applicable for time critical applications.
137.
AT86RF231
127
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