SI4322-A1-FT Silicon Laboratories Inc, SI4322-A1-FT Datasheet - Page 11

• Manufacturer Part Number: SI4322-A1-FT
• Description: IC RCVR FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc
• Type: FSK Receiverr

Specifications of SI4322-A1-FT

• Package / Case: 16-TSSOP
• Frequency: 868MHz, 915MHz
• Sensitivity: -104dBm
• Data Rate - Maximum: 256 kbps
• Modulation Or Protocol: FSK
• Applications: Remote Control, RKE, Security Systems
• Current - Receiving: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Features: RSSI Equipped
• Voltage - Supply: 2.2 V ~ 3.8 V
• Operating Frequency: 915 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Current: 12 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Memory Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 336-1628-5

No
No
Wake-Up Timer Command
The wake-up time period can be calculated by M <m13 : m0> , R <r3 : r0> and D <d1 : d0>:
No
Not t t t t e: e: e: e: e:
No
Extended Wake-Up Timer Command
These bits can be used for further fine adjustment of the wake-up timer. The explanation of the bits can be found above.
Low Battery Detector and Microcontroller Clock Divider Command
The 4-bit value T of t3-t0 determines the threshold voltage of the threshold voltage V
Bit 4 <elfc>:
Clock divider configuration (valid only if the crystal oscillator is on):
AFC Command
Bit 0 <en>:
Bit 1 <oe>:
Bit 2 <fi>:
Bit 3 <st>:
bit
Bit
bit
bit
15
15
15
15
1
1
1
1
The wake-up timer generates interrupts continuously at the programmed interval while the et bit is set.
14
14
14
14
1
1
1
1
Enables low frequency (32 kHz) microcontroller output clock during sleep mode.
Enables the output (frequency offset) register
Switches the circuit to high accuracy (fine) mode. In this case the processing time is about four times
Enables the calculation of the offset frequency by the AFC circuit (it allows the addition of the content of
the output register to the frequency control word of the PLL).
longer, but the measurement uncertainty is less than half.
Strobe edge. When st goes to high, the actual latest calculated frequency error is stored into the output
registers of the AFC block.
13
13
13
13
1
0
0
0
12
12
12
12
0
0
0
0
11
r3
11
11
11
0
0
0
10
r2
10
10
10
0
1
0
r1
9
d2
9
9
1
1
9
1
0
0
0
0
1
1
1
1
r0
8
8
1
8
0
d1
8
0
0
0
1
1
0
0
1
1
m7
a1
d1
7
7
d2
7
d0
7
0
1
0
1
0
1
0
1
m6
a0
d0
6
6
6
d1
T
V
6
wake-up
lb
= 2.0 V + T * 0.1 V
Frequency [MHz]
m13 m12 m11 m10
m5
rl1
5
5
5
d0
= M * 2
5
Clock Output
m4
rl0
4
elfc
4
4
4
R-D
1.25
1.66
3.33
2.5
ms
10
m3
st
3
1
2
5
3
3
t3
3
lb
of the detector:
m2
2
2
fi
2
t2
2
m1
m9
oe
1
t1
1
1
1
m0
m8
en
t0
0
0
0
0
E196h
C213h
C687h
C300h
POR
POR
POR
POR
Si4322
11