AD6655BCPZ-125 Analog Devices Inc, AD6655BCPZ-125 Datasheet - Page 22

• Manufacturer Part Number: AD6655BCPZ-125
• Description: IC IF RCVR 14BIT 125MSPS 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD6655BCPZ-125

• Function: IF Diversity Receiver
• Frequency: 450MHz
• Rf Type: Cellular, CDMA2000, GSM EDGE, W-CDMA
• Secondary Attributes: 32-Bit Numerically Controlled Oscillator
• Package / Case: 64-VFQFN, CSP Exposed Pad
• Receiving Current: 705mA
• Frequency Range: 450MHz
• Rf Ic Case Style: LFCSP
• No. Of Pins: 64
• Supply Voltage Range: 1.7V To 1.9V
• Operating Temperature Range: -40°C To +85°C
• Frequency Max: 650MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD6655-125EBZ - BOARD EVAL W/AD6655 & SOFTWARE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD6655
Pin No.
Digital Input
52
Digital Outputs
63
62
3
2
5
4
7
6
9
8
13
12
15
14
17
16
19
18
23
22
26
25
28
27
30
29
32
31
11
10
SPI Control
48
47
51
Signal Monitor Port
33
35
34
Mnemonic
SYNC
D0+ (LSB)
D0− (LSB)
D1+
D1−
D2+
D2−
D3+
D3−
D4+
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
D10+
D10−
D11+
D11−
D12+
D12−
D13+ (MSB)
D13− (MSB)
DCO+
DCO−
SCLK/DFS
SDIO/DCS
CSB
SMI SDO/OEB
SMI SDFS
SMI SCLK/PDWN
Type
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input/Output
Output
Input/Output
Digital Synchronization Pin. Slave mode only.
Channel A/Channel B LVDS Output Data 0—Complement.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Output Data 11—Complement.
Channel A/Channel B LVDS Output Data 12—Complement.
Channel A/Channel B LVDS Output Data 13—True.
Channel A/Channel B LVDS Output Data 13—Complement.
Channel A/Channel B LVDS Data Clock Output—Complement.
Signal Monitor Serial Data Output/Output Enable Input (Active Low) in External Pin Mode.
Description
Channel A/Channel B LVDS Output Data 0—True.
Channel A/Channel B LVDS Output Data 1—True.
Channel A/Channel B LVDS Output Data 1—Complement.
Channel A/Channel B LVDS Output Data 2—True.
Channel A/Channel B LVDS Output Data 2—Complement.
Channel A/Channel B LVDS Output Data 3—True.
Channel A/Channel B LVDS Output Data 3—Complement.
Channel A/Channel B LVDS Output Data 4—True.
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6—True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 11—True.
Channel A/Channel B LVDS Output Data 12—True.
Channel A/Channel B LVDS Data Clock Output—True.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer in External Pin Mode.
SPI Chip Select (Active Low).
Signal Monitor Serial Data Frame Sync.
Signal Monitor Serial Clock Output/Power-Down Input (Active High) in External Pin Mode.
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