U2794B-MFSG3 Atmel, U2794B-MFSG3 Datasheet - Page 4

• Manufacturer Part Number: U2794B-MFSG3
• Description: IC DEMODULATR QUAD 1K MHZ 20SOIC
• Manufacturer: Atmel

Specifications of U2794B-MFSG3

• Function: Demodulator
• Lo Frequency: 70MHz ~ 1GHz
• Rf Frequency: 40MHz ~ 1.03GHz
• P1db: 3.5dBm
• Noise Figure: 12dB
• Current - Supply: 35mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 20-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain: -

6. Electrical Characteristics
Test conditions (unless otherwise specified); V
System impedance Z
4
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes:
No.
1.1
1.2
2.1
3.1
3.2
4.1
4.2
4.3
4.4
4.5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
2
3
4
5
Parameters
Supply-voltage range
Supply current
Power-down Mode
“OFF” mode supply
current
Switch Voltage
“Power ON”
“Power DOWN”
LO Input, LO
Frequency range
Input level
Input impedance
Voltage standing
wave ratio
Duty-cycle range
RF Input, RF
Noise figure (DSB)
symmetrical output
Frequency range
–1 dB input
compression point
Second order IIP
Third order IIP
LO leakage
Input impedance
1. During power-down status a load circuitry with DC-isolation to GND is assumed, otherwise a current of I
2. The required LO-Level is a function of the LO frequency (see
3. Measured with input matching. For 950 MHz, the optional transmission line T3 at the RF input may be used for this pur-
4. Using pins 7 and 8 as a symmetric RF input, the second-order IIP can be improved.
5. Due to test board parasitics, this bandwidth may be reduced and not be equal for I, IX, Q, QX. If symmetry and full band-
6. The internal current of the output emitter followers is 0.6 mA. This reduces the undistorted output voltage swing at a 50
7. Referred to the level of the output vector
8. The low-gain status is achieved with an open or high-ohmic pin 11. A recommended application circuit for switching
U2794B
has to be added to the above power-down current for each output I, IX, Q, QX.
pose. Noise figure measurements without using the differential output signal result in a worse noise figure.
width is required, the lowpass pins 3, 4 and 9, 10 should be isolated from the board. the bandwidth of the I/Q outputs can
be increased further by using a resistor between pins 3, 4, 9 and 10. These resistors shunt the internal loads of
RI ~ 5.4 k . The decrease in gain here has to be considered.
load to approximately 30 mV. For low signal distortion the load impedance should be RI
between high and low gain status is shown in
O
= 50 , f
in
in
iLO
= 950 MHz, P
Test Conditions
V
V
(2)
See
See
at 950 MHz
at 100 MHz
f
High gain
Low gain
(4)
High gain
Low gain
Symmetric input
Asymmetric input
see
iRF
PU
PU
= f
Figure 6-10
= 1.0 V
Figure 6-10
Figure 6-3
iLO
0.5V
±BW
S
(1)
(3)
iLO
= 5V, T
YQ
= –10 dBm
amb
I
2
= 25°C, referred to test circuit
+
Figure
Q
14, 5
5, 6
7, 8
7, 8
7, 8
7, 8
7, 8
7, 8
7, 8
Pin
5, 6
14
14
17
17
17
17
17
2
6
6-1.
VSWR
Symbol
DCR
P
P
V
IIP
IIP
IIP
V
Figure
P
I
Z
1dBHG
Z
1dBLG
L
f
f
NF
V
SPU
POFF
PON
I
iLO
iRF
iLO
iRF
iLO
OL
S
2HG
3HG
3LG
S
LO
LO
6-6).
Min.
4.75
–12
0.4
22
70
40
4
500II0.8
Typ.
+3.5
–10
+13
1.2
30
20
50
12
10
–8
35
+3
–60
–55
1
5 k .
Max.
1000
1030
5.25
0.6
35
–5
1
2
MHz
dBm
MHz
dBm
dBm
dBm
dBm
Unit
4653F–CELL–11/08
mA
µA
µA
dB
(VS –0.8V)/RI
IIpF
V
V
V
Type*
A
A
B
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D