4420-DKDB2 Silicon Laboratories Inc, 4420-DKDB2 Datasheet - Page 19

KIT DEV TEST EZRADIO SI4420 TRX

4420-DKDB2

Manufacturer Part Number
4420-DKDB2
Description
KIT DEV TEST EZRADIO SI4420 TRX
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of 4420-DKDB2

Accessory Type
Test Card, Transceiver, 434MHz
Wireless Frequency
434 MHz
Interface Type
SPI
Modulation
FSK
For Use With/related Products
EZRadio®
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Note: Lock bit is high when the AFC loop is locked, f_same bit indicates when two subsequent measuring results are the same, toggle bit
In automatic operation mode (no strobe signal is needed from the microcontroller to update the output offset register) the AFC circuit is
automatically enabled when the VDI indicates potential incoming signal during the whole measurement cycle and the circuit measures the
same result in two subsequent cycles.
There are three operation modes, example from the possible application:
1, (a1=0, a0=1) The circuit measures the frequency offset only once after power up. In this way extended TX-RX maximum distance can be
achieved.
Possible application:
In the final application, when the user inserts the battery, the circuit measures and compensates for the frequency offset caused by the
crystal tolerances. This method allows for the use of a cheaper quartz in the application and provides protection against tracking an
interferer.
2a, (a1=1, a0=0) The circuit automatically measures the frequency offset during an initial effective low data rate pattern –easier to receive-
(i.e.: 00110011) of the package and changes the receiving frequency accordingly. The further part of the package can be received by the
corrected frequency settings.
2b, (a1=1, a0=0) The transmitter must transmit the first part of the packet with a step higher deviation and later there is a possibility to
reduce it.
In both cases (2a and 2b), when the VDI indicates poor receiving conditions (VDI goes low), the output register is automatically cleared. Use
these settings when receiving signals from different transmitters transmitting in the same nominal frequencies.
3, (a1=1, a0=1) It’s the same as 2a and 2b modes, but suggested to use when a receiver operates with only one transmitter. After a
complete measuring cycle, the measured value is kept independently of the state of the VDI signal.
10. TX Configuration Control Command
Bit
changes state in every measurement cycle.
Frequency control word
Power-on reset
15
1
10MHz CLK
Parameter from
(POR)
F<11:0>
a1 to a0
rl1 to rl0
VDI*
14
en
oe
st
fi
0
BASEBAND SIGNAL IN
13
0
ENABLE CALCULATION
AUTO OPERATION
OUTPUT ENABLE
FINE
/4
RANGE LIMIT
12
1
STROBE
SE L
I0
I1
MUX
11
1
Y
CLK
10
0
DIGITAL AFC
CORE LOGIC
9
0
operation modes
singals for auto
mp
8
7
m3
7
DIGITAL LIMITER
IF IN>MaxDEV THEN
IF IN<MinDEV THEN
OUT=MaxDEV
OUT=MinDEV
m2
6
output enable
OUT=IN
ELSE
strobe
m1
5
m0
4
7
CLK CLR
REGISTER
3
0
OFFSET
FREQ.
7 BIT
NOTE:
* VDI (valid data indicator) is an internal signal of the
controller. See the Receiver Setting Command for details.
** ATGL: toggling in each measurement cycle
*** ASAME: logic high when the result is stable
p2
2
OFFS
<6:0>
p1
1
ADDER
12 BIT
p0
0
ASAME***
ATGL**
Corrected frequency
9800h
parameter to
synthesizer
POR
Fcorr<11:0>
Si4420
19

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