4420-DKDB2 Silicon Laboratories Inc, 4420-DKDB2 Datasheet - Page 12

• Manufacturer Part Number: 4420-DKDB2
• Description: KIT DEV TEST EZRADIO SI4420 TRX
• Manufacturer: Silicon Laboratories Inc

Specifications of 4420-DKDB2

• Accessory Type: Test Card, Transceiver, 434MHz
• Wireless Frequency: 434 MHz
• Interface Type: SPI
• Modulation: FSK
• For Use With/related Products: EZRadio®
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Control Commands
In general, setting the given bit to one will activate the related function. In the following tables, the POR column shows the default values of
the command registers after power-on.
Description of the Control Commands
1. Configuration Setting Command
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Bit
Bit el enables the internal data register. If the data register is used the FSK pin must be connected to logic high level.
Bit ef enables the FIFO mode. If ef=0 then DATA (pin 6) and DCLK (pin 7) are used for data and data clock output.
Control Command
Configuration Setting Command
Power Management Command
Frequency Setting Command
Data Rate Command
Receiver Control Command
Data Filter Command
FIFO and Reset Mode Command
Receiver FIFO Read Command
AFC Command
TX Configuration Control Command
Transmitter Register Write Command
Wake-Up Timer Command
Low Duty-Cycle Command
Low Battery Detector and
Microcontroller Clock Divider
Command
Status Read Command
b1
15
0
0
1
1
1
b0
0
1
0
1
14
0
Frequency Band {MHz]
13
0
12
0
315
433
868
915
11
0
10
0
9
0
Related Parameters/Functions
Frequency band, crystal oscillator load capacitance,
TX register, RX FIFO
Receiver/Transmitter mode change, synthesizer, xtal
osc, PA, wake-up timer, clock output can be enabled
here
Frequency of the local oscillator/carrier signal
Bit rate
Function of pin 16, Valid Data Indicator, baseband
bw, LNA gain, digital RSSI threshold
Data filter type, clock recovery parameters
Data FIFO IT level, FIFO start control, FIFO enable
and FIFO fill enable
RX FIFO can be read with this command
AFC parameters
Modulation parameters, output power, ea
TX data register can be written with this command
Wake-up time period
Enable low duty-cycle mode. Set duty-cycle.
LBD voltage and microcontroller clock division ratio
Status bits can be read out
8
0
el
7
ef
6
x3
0
0
0
0
1
1
b1
5
x2
0
0
0
0
1
1
b0
4
x1
0
0
1
1
1
1
x3
3
x0
0
1
0
1
0
1
x2
2
Crystal Load Capacitance [pF]
x1
1
…
Related control bits
el, ef, b1 to b0, x3 to x0
er, ebb, et, es, ex, eb, ew, dc
f11 to f0
p16, d1 to d0, i2 to i0, g1 to g0, r2
to r0
f3 to f0, al, ff, dr
t7 to t0
r4 to r0, m7 to m0
d6 to d0, en
d2 to d0, v4 to v0
cs, r6 to r0
al, ml, s, f2 to f0
a1 to a0, rl1 to rl0, st, fi, oe, en
mp, m3 to m0, p2 to p0
x0
0
10.0
15.5
16.0
8.5
9.0
9.5
8008h
POR
Si4420
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