CK-S6-SP623-G Xilinx Inc, CK-S6-SP623-G Datasheet - Page 14

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CK-S6-SP623-G

Manufacturer Part Number
CK-S6-SP623-G
Description
BOARD DEV S6 WITH TX
Manufacturer
Xilinx Inc
Series
Spartan™-6r
Type
FPGAr
Datasheets

Specifications of CK-S6-SP623-G

Contents
Board, Cables, Documentation, Power Supply
For Use With/related Products
Spartan™-6 FPGA, XC6SLX150T
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 1: SP623 Board Features and Operation
14
FPGA Configuration
Linear Technology Module is installed, place jumpers on JP1 and/or JP2 across pins 2–3
(OFF position).
Note:
external supply to its corresponding supply jack.
The Texas Instruments and Intersil modules do not have voltage regulation jumpers and
must be removed from the board before providing external power to the GTP transceiver
rails.
Note:
connected across J1 before powering the board with the Intersil module installed. Failure to do so
may prevent your design from running properly.
MGTAVCCPLL Rail
The GTP transceiver power module also supplies the MGTAVCCPLL rail through the J3
shorting plug
default. The MGTAVCCPLL rail can also be supplied from an external 1.2V (nominal)
power supply by removing the J3 shorting plug and then connecting the power supply
output to J5.
X-Ref Target - Figure 1-5
[Figure
The FPGA is configured in JTAG mode only using one of the following options:
Detailed information on the System ACE controller is available in
DS080, System ACE CompactFlash Solution.
The FPGA is configured through one of the aforementioned cables by connecting the cable
to the download cable connector, J1.
The FPGA is configured through the System ACE controller by setting the 3-bit
configuration address DIP switches (SW3) to select one of eight bitstreams stored on a
CompactFlash memory card (see
Platform Cable USB
Parallel Cable IV
Parallel Cable III
System ACE controller
The power regulation jumper must be placed in the OFF position before connecting an
The Intersil module features an MGTAVCC voltage adjust header, J1. Verify that a jumper is
1-2, callout 2]
VCC3V3
12V DC
(Figure
VCC5
Figure 1-5: MGTAVCCPLL Isolation Jumper
1-5). This jumper connects MGTAVCC and MGTAVCCPLL rails by
www.xilinx.com
Supply Module
GTP Power
Configuration Address DIP Switches, page
MGTAVCC
MGTAVTT
J3
UG751 (v1.1) September 15, 2010
J178
External Supply Jacks
MGTAVCCPLL
SP623 Board User Guide
J189
UG751_c1_05_041910
16).
J5

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