73S1217F-EB-LITE Maxim Integrated Products, 73S1217F-EB-LITE Datasheet - Page 22

• Manufacturer Part Number: 73S1217F-EB-LITE
• Description: BOARD EVAL 73S1217F CBL/DOC/CD
• Manufacturer: Maxim Integrated Products

Specifications of 73S1217F-EB-LITE

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

73S1217F Evaluation Board Lite User Guide
4.5.3 USB Interface
The USB interface on the 73S1217F requires few external components for proper operation. Two serial
resistors of 24 Ω ± 1% are needed to provide proper impedance matching for the USB data signals D+
and D-. These resistors must be 24 Ω ± 1%.
For self-powered USB applications, a connection must be made between the VBUS power input and
USR7 for proper operation with the provided API libraries. A direct connection cannot be made as the
VBUS voltage exceeds the digital power supply running at 3.3 V. As a result, a resistor divider is required
to scale the VBUS voltage down to 3.3 V.
4.5.4 Smart Card Interface
The smart card interface on the 73S1217F requires few external components for proper operation.
Figure 8
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The smart card interface layout is important. The following guidelines should be followed to provide the
optimum smart card interface operation:
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The RST and CLK signals should have 27 pF capacitors at the smart card connector.
It is recommended that a 0 Ω resistor be added in series with the CLK signal. If necessary, in noisy
environments, this resistor can be replaced with a small resistor to create a RC filter on the CLK
signal to reduce CLK noise. This filter is used to soften the clock edges and provide a cleaner clock
for those environments where this could be problematic.
The VCC output must have a 1.0 µF capacitor at the smart card connector for proper operation.
The VPC input is the power supply input for the smart card power. It is recommended that both a
10 µF and a 0.1 µF capacitor are connected to provide proper decoupling for this input.
The PRES input on the 73S1217F contains a very weak pull down resistor. As a result, an additional
external pull down resistor is recommended to prevent any system noise from triggering a false card
event. The same holds true for the PRES input, except a pull up resistor is utilized as the logic is
inverted from the PRES input.
Route auxiliary signals away from card interface signals.
Keep CLK signal as short as possible and with few bends in the trace. Keep route of the CLK trace to
one layer (avoid vias to other plane). Keep CLK trace away from other traces especially RST and
VCC. Filtering of the CLK trace is allowed for noise purpose. Up to 30 pF to ground is allowed at the
CLK pin of the smart card connector. Also, the zero ohm series resistor, R7, can be replaced for
additional filtering (no more than 100 Ω).
Keep VCC trace as short as possible. Make trace a minimum of 0.5 mm thick. Also, keep VCC away
from other traces especially RST and CLK.
shows the recommended smart card interface connections:
Figure 15: USB Connections
Figure 7
shows the basic USB connections.
73S1217F
UG_1217F_046
Rev. 1.2