DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 56

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DK-DEV-4SGX530N

Manufacturer Part Number
DK-DEV-4SGX530N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IV GXr
Type
FPGAr

Specifications of DK-DEV-4SGX530N

Contents
Board, Cable, Documentation, Power Supply
For Use With/related Products
Stratix® IV GX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2714

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0
2–48
Table 2–45. SDI Video Input Interface Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 2)
Figure 2–14. SDI Cable Equalizer
Memory
Stratix IV GX FPGA Development Board Reference Manual
U2.7
U2.14
Reference
Board
Coaxial Cable
f
Device enable
Bypass enable
Description
Figure 2–14
This section describes the board’s memory interface support, signal names, types, and
connectivity relative to the Stratix IV GX device. The board has the following memory
interfaces:
For more information about the memory interfaces, refer to the
Interface
DDR3 Bottom Port
DDR3 Top Port
QDRII+ Top Port 0
QDRII+ Top Port 1
SSRAM
Flash
MUTE
MUTE
BYPASS
Handbook.
3.9 nH
REF
75 Ω
shows the SDI cable equalizer.
SDI_RX_BYPASS
Signal Name
SDI_RX_EN
Schematic
75 Ω
1.0 μF
37.4 Ω
I/O Standard
1.0 μF
2.5-V
SDI
SDI
MUTE
MUTE
BYPASS
LMH0344 3G SDI
MAX II CPLD EPM2210
Adaptive Cable
System Controller
REF
Equalizer
1.0 μF
Pin Number
M6
T4
SDO
SDO
CD
August 2010 Altera Corporation
Chapter 2: Board Components
External Memory
(Automatically driven
Stratix IV GX Device
To FPGA
by carrier detect)
CD
Pin Number
Memory

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