73M1903C-EVM Maxim Integrated Products, 73M1903C-EVM Datasheet - Page 9

• Manufacturer Part Number: 73M1903C-EVM
• Description: BOARD DEMO 73M1903C WORLDWIDE
• Manufacturer: Maxim Integrated Products

Specifications of 73M1903C-EVM

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -

UM_1903C_030
2.2
Table 1
read or written by a host controller or a DSP using the MAFE interface control frame format.
All registers and their bits are described in detail in the 73M1903C Data Sheet.
2.3
The following example shows the sequence to follow to bring the 73M1903C device out of reset and to
start up after power up.
RESET the 73M1903 Device
1. Power up the system.
2. Wait for the 3.3 V power to become stable.
3. Hold the 73M1903C RESET pin low for 100 ns or longer then let it go high.
4. Wait for 100 µs for the PLL and OSC to be stabilized.
INITIALIZE the 73M1903 Device
There are control operating modes; Hardware Control and Software control. In the Hardware Control
mode, the serial interface will alternate between data frames and control frames. If synchronization is lost
and it is not known whether a data or control frame is being sent, it is necessary to reinitialize the HC
mode. Since there isn’t way to initially tell the difference between whether a control frame or data frame is
being sent, it is necessary to send a reset of this bit in two consecutive frames, and the procedure for this
is as follows:
A. Frame Synchronization
Rev. 2.0
Address Default
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
1. Reset the HC bit (Register 0x01 bit 0) in a frame sequence.
73M1903C Register Map
73M1903C System Initialization
shows the memory map of the addressable registers in the 73M1903C. Each register can be
The 73M1903C device does not have a power on reset circuit. For proper operation, a reset
signal must be asserted from the host by pulling the 73M1903C reset pin low for approximately
100 ns or longer after the power is stabilized. The 73M1903C device will be ready to use
within 100 µs after the removal of the reset pulse from the reset pin.
0xC0
0xFF
0xFF
0x0A
0x08
0x00
0x00
0x00
0x50
0x00
0x00
0x22
0x12
0x00
0x00
reserved reserved
reserved reserved
Unused
Unused
GPIO7
Frcvco
TMEN
Pseq7
Nseq7
ENFE
Ichp3
Rev3
Prst2
DIR7
Xtal1
Bit 7
Table 1: 73M1903C Register Memory Map
PwdnPLL
GPIO 6
SelTX2
Ndvsr6
TestPll
DIGLB
Nseq6
Pseq6
Ichp2
Rev2
Prst1
Bit 6
DIR6
Xtal0
LokdetEn
reserved reserved reserved reserved reserved reserved
reserved reserved reserved reserved reserved reserved
TXBST1
Tclksel1
GPIO 5
ANALB
Ndvsr5
Nseq5
Lokdet
Pseq5
Ichp1
Rev1
Prst0
Bit 5
DIR5
TXBST0
Tclksel0
Unused
GPIO 4
Pdvsr4
Ndvsr4
Nseq4
INTLB
Pseq4
ThLk0
Ichp0
Rev0
Bit 4
DIR4
73M1903C Evaluation Board User Manual
FSBDEn
CkoutEn RXPULL
Unused
Unused
GPIO 3
Pdvsr3
Ndvsr3
TXDIS
Nseq3
Pseq3
Bit 3
DIR3
ATX
FL
Unused
GPIO 2
Trim(2)
Ndvsr2
Pdvsr2
Pseq2
Nseq2
RXG1
Kvco2
Nrst2
DIR2
Bit 2
DTX
Unused
GPIO 1
Trim(1)
Pdvsr1
Ndvsr1
Nseq1
RXG0
SPOS
Pseq1
Kvco1
Nrst1
Bit 1
DIR1
ARX
RXGAIN
Unused
GPIO 0
Trim(0)
Ndvsr0
Pdvsr0
Pseq0
Nseq0
Kvco0
Nrst0
DIR0
Bit 0
DRX
HC
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