73M1903C-EVM Maxim Integrated Products, 73M1903C-EVM Datasheet

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73M1903C-EVM

Manufacturer Part Number
73M1903C-EVM
Description
BOARD DEMO 73M1903C WORLDWIDE
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of 73M1903C-EVM

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Embedded
-
TM
Simplifying System Integration
73M1903C
Evaluation Board User Manual
June 12, 2009
Rev. 2.0
UM_1903C_030

Related parts for 73M1903C-EVM

73M1903C-EVM Summary of contents

Page 1

... TM Simplifying System Integration Evaluation Board User Manual 73M1903C June 12, 2009 Rev. 2.0 UM_1903C_030 ...

Page 2

... Evaluation Board User Manual © 2009 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Simplifying System Integration is a trademark of Teridian Semiconductor Corporation. All other trademarks are the property of their respective owners. Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expressly contained in the Company’ ...

Page 3

... Typical Sample Rate Settings ............................................................................................. 11 3 Hardware Description .................................................................................................................. 12 3.1 Board Settings: Jumpers and Connectors ........................................................................... 12 3.2 Board Physical and Operating Information .......................................................................... 16 4 73M1903C Evaluation Board Schematics, PCB Layouts and Bill of Materials .......................... 17 4.1 Schematic ........................................................................................................................... 17 4.2 PCB Layouts ....................................................................................................................... 18 4.3 Bill of Materials ................................................................................................................... 21 5 Ordering Information ................................................................................................................... 23 6 Related Documentation ...

Page 4

... Figure 9: 73M1903C Evaluation Board Electrical Schematic .................................................................. 17 Figure 10: 73M1903C Evaluation Board Silk Screen Top ....................................................................... 18 Figure 11: 73M1903C Evaluation Board Top Signal Layer ..................................................................... 19 Figure 12: 73M1903C Evaluation Board Layer 2 – Ground Plane ........................................................... 19 Figure 13: 73M1903C Evaluation Board Layer 3 – Supply Plane ............................................................ 20 Figure 14: 73M1903C Evaluation Board Bottom Signal Layer ................................................................ 20 Tables Table 1: 73M1903C Register Memory Map ...

Page 5

... Evaluation Board Host Interfaces The 73M1903C Evaluation Board includes a Modem Analog Front End (MAFE) Interface with a 20-pin right angle connector to connect to a target DSP or CPU system. The Evaluation Board also includes a 3.3 V power receptacle for powering the on board circuits from either the target system or an external power supply ...

Page 6

... Evaluation Board User Manual 2 System Description Figure 2 shows a block diagram of the 73M1903C Evaluation Board. This section includes descriptions of: • Modem Analog Front End (MAFE) Host System Interface • 73M1903C Register Map • System Initialization SCLK FSB FSBD SDIN SDOUT RESET ...

Page 7

... DSP. This serial data port is a bi-directional port that is supported by most DSPs available in the market. The MAFE interface requires one end to act as a master and the other as a slave. The 73M1903C device can be configured either as a master slave (refer to ...

Page 8

... Evaluation Board User Manual SCLK FSB TX15 TX14 TX13 TX12 TX11 TX10 TX9 TX8 TX7 TX6 TX5 TX4 TX3 TX2 TX1 TX0 SDIN RX15 RX14 RX13 RX12 RX11 RX10 RX9 RX8 RX7 RX6 RX5 RX4 RX3 RX2 RX1 RX0 SDOUT ...

Page 9

... PwdnPLL 2.3 73M1903C System Initialization The following example shows the sequence to follow to bring the 73M1903C device out of reset and to start up after power up. The 73M1903C device does not have a power on reset circuit. For proper operation, a reset signal must be asserted from the host by pulling the 73M1903C reset pin low for approximately 100 ns or longer after the power is stabilized. The 73M1903C device will be ready to use within 100 µ ...

Page 10

... Evaluation Board User Manual 2. Reset the HC bit (Register 0x01 bit 0) in next frame sequence. At this point, the 73M1903C is guaranteed the software controlled control frame mode. All the MAFE serial data will be data only unless the host requests a control frame by setting the LSB of the TX data to a one by setting bit 0 of data frame ...

Page 11

... CTRL10 (0x0A) 0x10 CTRL11 (0x0B) 0x0D CTRL12H (0x0C) 0x02 CTRL12L (0x0D) 0xC1 Rev. 2.0 73M1903C Evaluation Board User Manual // Timing chain set up // Delay for 2 sample cycle time to // let PLL settle before Lockdet Sample Rate 8 kHz 9.6 kHz 0x00 0x00 0x0A ...

Page 12

... Evaluation Board User Manual 3 Hardware Description 3.1 Board Settings: Jumpers and Connectors Figure 7 shows all the connectors and jumpers available on 73M1903C Evaluation Board. J6 Figure 7: 73M1903C Evaluation Board Jumpers and Connectors Table 3 lists the Evaluation Board connectors. JS1 is the main connector for interfacing to a host processor or DSP board ...

Page 13

... UM_1903C_030 Pin# Name 1 NC (SCLK in slave mode) 2 RINGD 3 HOOK 4 FSB 5 FSBD Table 5: 73M1903C Evaluation Board Jumper Description Schematic and Name PCB Reference JP1 Jumper Strap JP2 Jumper Strap JP3 Jumper Strap JP4 Jumper Strap JP5 Jumper Strap JP6 Jumper Strap JP7 ...

Page 14

... OPEN: 73M1903C SLAVE configuration (R8 must be populated) Two-pin header to enable Daisy Chaining. SHUNT: 72M1903C FSBD signal is connected to JP25 pin3 and JS1 pin through JP1 (Daisy Chain enable) OPEN: 73M1903C FSBD pin is isolated (No Daisy Chain) Three-pin header for selecting the line monitor speaker volume. Manual volume control: J1 ...

Page 15

... High High High Three-pin header that selects the Ring Detector output to connect to either GPIO4 of the 73M1903C Host CPU GPIO through JS1 or JP25. 1-2: Ring Detector output is fed to 73M1903C GPIO4 (GPIO4 must be configured as an input). 2-3: Ring detector output is directed to a host controller through either JS1 or JP25 ...

Page 16

... Evaluation Board User Manual 3.2 Board Physical and Operating Information 0.20 0.69 2.15 0.62 RJ11 0.33 Figure 8: 73M1903C Evaluation Board PCB Dimensions PCB Dimensions • Size • Height with components and solder Environmental • Operating Temperature ( crystal oscillator function is affected outside –10 °C to +60 °C range) • ...

Page 17

... UM_1903C_030 4 73M1903C Evaluation Board Schematics, PCB Layouts and Bill of Materials 4.1 Schematic Softw are Volume control: Manual volume control: J1(2-3), J2(2-3) and J3(2-3). VCCD gain. Slave mode: Open JP23 TP1 + GPIO0 Master mode: Shunt JP23 3.3UF 0.1UF Slave mode: Populate R8 w ith a JP25 4 ...

Page 18

... Evaluation Board User Manual 4.2 PCB Layouts Figure 10: 73M1903C Evaluation Board Silk Screen Top 18 UM_1903C_030 Rev. 2.0 ...

Page 19

... UM_1903C_030 Figure 11: 73M1903C Evaluation Board Top Signal Layer Figure 12: 73M1903C Evaluation Board Layer 2 – Ground Plane Rev. 2.0 73M1903C Evaluation Board User Manual 19 ...

Page 20

... Evaluation Board User Manual Figure 13: 73M1903C Evaluation Board Layer 3 – Supply Plane Figure 14: 73M1903C Evaluation Board Bottom Signal Layer 20 UM_1903C_030 Rev. 2.0 ...

Page 21

... UM_1903C_030 4.3 Bill of Materials Table 6 provides the bill of materials for the 73M1903C Evaluation Board schematic provided in Table 6: 73M1903C Evaluation Board Bill of Materials Item Qty. Reference 1 4 C1, C14, C17, C19 2 4 C2, C5, C10, C12 3 6 C3, C4, C8, C18, C20, C22 4 4 C6, C7, C21, C23 ...

Page 22

... Evaluation Board User Manual Item Qty. Reference 44 1 R51, R52 45 17 TP1 – TP18 U3 Part Manufacturer 0 Ω Panasonic Test point Sullin EMIT4033L Sumita TPA2001D1 TI 73M1903C-32 Teridian TLP627 Toshiba H04 Diodes 24.576 MHz ECS inc UM_1903C_030 Rev. 2.0 ...

Page 23

... Irvine, CA 92618-5201 Telephone: (714) 508-8800 FAX: (714) 508-8878 Email: modem.support@teridian.com For a complete list of worldwide sales offices http://www.teridian.com. Revision History Revision Date Description 1.0 11/12/2004 First release. 2.0 6/12/2009 Revised in new format. Rev. 2.0 73M1903C Evaluation Board User Manual Order Number 73M1903C-EVM 23 ...

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