73M1903C-EVM Maxim Integrated Products, 73M1903C-EVM Datasheet - Page 17

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73M1903C-EVM

Manufacturer Part Number
73M1903C-EVM
Description
BOARD DEMO 73M1903C WORLDWIDE
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of 73M1903C-EVM

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Embedded
-
UM_1903C_030
4 73M1903C Evaluation Board Schematics, PCB Layouts and Bill of Materials
4.1
Rev. 2.0
DEFAULT SETTING:
Shunt JP7, JP8, JP10, JP11, JP20, JP22
This version supports:
---Ring Detection
---Caller ID
RINGD
AFEOUT
AFEIN
SCLK
SLV_CLK
FSBD
FS
1
SCLK
FSBD
TP7
Schematic
JP22MODE 0
SCLKMODE
open
Slave mode: Shunt JP14, JP1
Master mode: Open JP14, JP1
Slave mode: Populate R31 w ith 0 Ohm
Master mode: Do not populate R31
HOOK
JP15
JP3
JP4
JP5
JP6
JP18
JP19
JP7
JP16
JP9
JP20
FSBD
AFEIN
1
1
2
RESET
TP8
RESET
JP1
Slave mode: Open JP23
Master mode: Shunt JP23
TP6
TP9
JP25
1
3
5
7
9
HEADER 5X2
JP24
JP14
JP8
JP2
10
1
1
2
4
6
8
JP21GATED SCK
MODE0
open
JS1 CONN SOCKET 10X2
1
2
GPIO7
GPIO6
3M 5120-B7A2JL
11
13
15
17
19
1
3
5
7
9
1
3
5
7
9
11
13
15
17
19
RINGD
FS
SCLK
AFEOUT
VCCD
VCCD
NLC322522T-4R7M
10
12
14
16
18
20
C18
0.1UF
2
4
6
8
2
4
6
8
10
12
14
16
18
20
0.1UF
L3
Softw are Volume control:
J3(2-3).
C3
C19
3.3UF
+
VCCA
J1(2-3), J2(2-3) and
VCCD
32
31
30
29
28
27
26
25
JP23
VCCD
C22
0.1UF
3.3UF
SDOUT
GPIO7
GPIO6
SDIN
SCKMODE
TEST
RST
VPD
C1
+
73M1903C-32_0
JP12
JP13
JP17
JP10
JP11
POWER CONNECTOR
U2
J7
1
O
Y 1 24.576M
C25
33PF
R52 0
S
VCCD
RESET
HOOK
I
Slave mode: Populate R8 w ith a
4.7K resistor
Master mode: Do not populate R8
NLC322522T-4R7M
TXAN1
TXAN2
3
2
1
Figure 9: 73M1903C Evaluation Board Electrical Schematic
TXAP1
TXAP2
Manual volume control:
gain.
TP1
GPIO0
RXAN
FS
RXAP
VNA
VPA
Default setting:
Default setting:
Do not populate R52
L2
Shunt J23 and remove R8.
J1 (1-2) , J2/J3(don't care):Shutdow n (MUTE)
J1(open), J2((1-2),J3(1-2) : 6db Amp gain
J1(open), J2((1-2),J3(open) : 12db Amp gain
J1(open), J2((open),J3(1-2) : 18db Amp gain
J1(open), J2((open),J3(open) : 23.4db Amp
R8 4.7K NC
C26
22PF
TP11
GND
9
10
11
12
13
14
15
16
VCCD
SLV_CLK
1
1
VCCA
C15 10UF
C20 0.1UF
TP18
GND
RXAN
OFFHOOK
HEADER3
TP12
TXAP1
OPTIONS:
JS 1 - Redw ood 5 Connector 20 pin Rt. angle socket
Shunt JP7,JP8, JP10, JP11, JP20, JP22 and install R48, R49.
Use Sumida MIT 4033 Transformer
Energy ring detection: Remove U3, D4, D2, D3, R29, R33 and
replace C25 and C26 w ith 0.22uF
J5
1
2
3
TP2
RXAP
TP13
1
TP10
R18
R21
R6 150K
R14
TXAP2
C14
C17
HEADER3
RING DETECTOR
150K
3.3UF
TXAN2
150K
3.3uF
150K
TP4
SHUTDOWN
J1HEADER3
TXAN1
TP3
R4 48.7K
R23
48.7K
J4
R10 49.9
R19 49.9
GAIN1
J2HEADER3 J3HEADER3
R11
R13
R20
C21
C23
R48 100
C6 150n
C7 150n
R16
210
GAIN0
374
C13
.082UF
150n
150n
210
R15
20K
374
HOOK
TP14
TRAN2
RINGB
TLP627
U3
TLP627
TP5
TRAN1
U5
VCCD
RING Detection
3A
3B
4B
4A
R29
Sumida
TRANSFORMER_0
20K
Of f hook Control
T1
2A
2B
1B
1A
R1
C16
10UF 25V
D4
1N4001
R5 4.7K
R9
+
R2
R3
120K
4.7K
BZT52C15-7
120K
1
C4
0.1uF
C8
0.1uF
D1
22V
D2
73M1903C Evaluation Board User’s Manual
120K
Q1
22V
R24
18
2
C9
10uF
R30
R49
9.1K
FZT605CT
2
D3
C28
C10
1uF
0.47UF 200V
1
VCCD
56K
1
R17
33K
R22
62K
R33 9.1K
1
2
3
4
5
6
7
8
2
CID coupling
RING path
INP
INN
SHDN
GAIN0
GAIN1
PVDD
OUTP
PGND
U1
C27
-
TPA2001D1
+
R51
R50
HD04
AGND
COSC
ROSC
PVDD
OUTN
PGND
C24
3.3UF 25V
0
0.47UF 200V
BY P
VDD
Q2
MMBTA42L
4.7k
U4
+
16
15
14
13
12
11
10
9
NLC322522T-4R7M
1
NLC322522T-4R7M
C29
0.047u
L1
C5
Dial Pulse Shaper
P3100SC
TECCOR
SIDACTOR
L4
This block must be
isolated from the main
power/ground plane.
VCCA
R12
120K
1uF
BST1811P-06
E1
C11
220pF
INTERVOX
TIP
RING
VCCD
TP15
TP16
3
1
2
C2
1uF
C12
1uF
LS1
F1
TR600-150
RAY CHEM
POLY SWITCH
J6
RJ-11
6
5
4
3
2
1
17

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