XR16C864IQ-F Exar Corporation, XR16C864IQ-F Datasheet - Page 31
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XR16C864IQ-F
Manufacturer Part Number
XR16C864IQ-F
Description
IC UART FIFO 128B QUAD 100QFP
Manufacturer
Exar Corporation
Type
Quad UART with 128-byte FIFOsr
Datasheet
1.XR16C864IQ-F.pdf
(51 pages)
Specifications of XR16C864IQ-F
Number Of Channels
4, QUART
Package / Case
100-BQFP
Features
*
Fifo's
128 Byte
Protocol
RS232, RS485
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
2 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.97 V
Supply Current
3 mA to 6 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.97 V to 5.5 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1277
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16C864IQ-F
Manufacturer:
NAIS
Quantity:
420
Company:
Part Number:
XR16C864IQ-F
Manufacturer:
Exar Corporation
Quantity:
10 000
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REV. 2.0.1
LCR[7]: Baud Rate Divisors Enable
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
MCR[2]: OP1# Output or RS485 Output Control
In the Loopback Mode, this bit is used to write the state of the modem RI# interface signal. If Auto RS-485
Half-Duplex direction control is enabled via FCTR bit-3, MCR bit-2 should not be written to.
MCR[3]: INT Output Enable
Enable or disable INT outputs to become active or in three-state. This function is associated with the INTSEL
input, see below table for details. This bit is also used to control the OP2# signal during internal loopback
mode. INTSEL pin must be set to a logic zero during 68 mode.
MCR[4]: Internal Loopback Enable
MCR[5]: Xon-Any Enable
4.7
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers are selected.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
Logic 0 = INT (A-D) outputs disabled (three state) in the 16 mode (default). During loopback mode, it sets
OP2# internally to a logic 1.
Logic 1 = INT (A-D) outputs enabled (active) in the 16 mode. During loopback mode, it sets OP2# internally
to a logic 0.
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and
Logic 0 = Disable Xon-Any function (for 16C550 compatibility, default).
Logic 1 = Enable Xon-Any function. In this mode, any RX character received will resume transmit operation.
The RX character will be loaded into the RX FIFO , unless the RX character is an Xon or Xoff character and
the 864 is programmed to use the Xon/Xoff flow control.
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
INTSEL
P
0
0
1
IN
MCR
B
T
IT
X
0
1
ABLE
-3
13: INT O
INT A-D O
31
UTPUT
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
Three-State
UTPUTS IN
Active
Active
M
ODES
Figure
16 M
ODE
12.
XR16C864