XR21V1412IL32-F Exar Corporation, XR21V1412IL32-F Datasheet - Page 24

• Manufacturer Part Number: XR21V1412IL32-F
• Description: IC UART FIFO USB DUAL 32QFN
• Manufacturer: Exar Corporation
• Type: USB UARTsr

Specifications of XR21V1412IL32-F

• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Number Of Channels: 2, DUART
• Fifo's: 128 Byte, 384 Byte
• Protocol: USB 2.0
• Voltage - Supply: 2.97 V ~ 3.63 V
• With Auto Flow Control: Yes
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Current: 16 mA
• Operating Supply Voltage: 2.97 V to 3.63 V
• No. Of Channels: 2
• Data Rate: 12Mbps
• Uart Features: Automatic Hardware And Software Flow Control, Half-Duplex Mode, Fractional Baud Rate Generator
• Supply Voltage Range: 2.97V To 3.63V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 1016-1301 - EVAL BOARD FOR XR21V1412IL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 1016-1302

XR21V1412
2-CH FULL-SPEED USB UART
Writing a ’1’ in this register drives the GPIO output high. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
Writing a ’1’ in this register drives the GPIO output low. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
This register reports the current state of the GPIO pin.
This register enables the Wide mode functionality for the UART.
WIDE_MODE[0]: Enable wide mode
WIDE_MODE[7:1]: Reserved
These bits are reserved and should remain ’0’.
A
3.4
3.3.14
3.3.15
3.3.16
3.4.1
DDRESS
0X0B
0X0C
0X0E
0X03
0X04
0X06
Logic 0 = Normal (7, 8 or 9 bit data) mode
Logic 1 = Wide mode -
Wide Mode Receive” on page
UART Custom Registers
UART CHAN A
WIDE_MODE
UART CHAN A
LOW_LATENCY
UART CHAN A
CUSTOM_INT_PACKET
UART CHAN B
WIDE_MODE
UART CHAN B
LOW_LATENCY
UART CHAN B
CUSTOM_INT_PACKET
GPIO_SET Register Description (Read/Write)
GPIO_CLEAR Register Description (Read/Write)
GPIO_STATUS Register Description (Read-Only)
WIDE_MODE Register Description (Read/Write)
R
EGISTER
N
AME
See
“Section 1.5.1.1, Wide Mode Transmit” on page 9
9.
B
T
IT
ABLE
0
0
0
0
0
0
-7
15: UART C
GPIO5
GPIO5
B
IT
0
0
0
0
-6
24
GPIO4
GPIO4
B
USTOM
IT
0
0
0
0
-5
R
GPIO3
GPIO3
EGISTERS
B
IT
0
0
0
0
-4
GPIO0
GPIO0
B
IT
0
0
0
0
-3
B
IT
0
0
0
0
0
0
-2
and
“Section 1.5.2.1,
GPIO2
GPIO2
B
IT
0
0
0
0
-1
REV. 1.1.0
GPIO1
GPIO1
B
EN
EN
EN
EN
IT
-0